Daeho Yun
Orcid: 0000-0003-4577-1653
According to our database1,
Daeho Yun authored at least 7 papers
between 2012 and 2026.
Collaborative distances:
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Bibliography
2026
A 48-Gb/s PAM-4 Transceiver With Transition Boosting and RLM Calibration for Next-Generation Memory Interface Testing.
IEEE Trans. Very Large Scale Integr. Syst., March, 2026
A 1cnm 14.4Gb/s/pin 16Gb LPDDR6 SDRAM with Efficiency Mode, LDO-Based WCK Tree, Dynamic Write NT-ODT, Fast CS Control and System Meta Mode.
Proceedings of the IEEE International Solid-State Circuits Conference, 2026
2023
Proceedings of the IEEE International Symposium on Circuits and Systems, 2023
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2023
2022
IEEE Trans. Circuits Syst. II Express Briefs, 2022
2021
Proceedings of the 18th International SoC Design Conference, 2021
2012
A Low-Power Switching Method with a Bootstrapping Circuit for High-Speed Transmitters.
IEICE Trans. Electron., 2012