Joao Marcelo Ferreira

According to our database1, Joao Marcelo Ferreira authored at least 7 papers between 2015 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2017
Latency reduction of fault-tolerant NoCs by employing multiple paths.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Analysis of routing algorithms generation for irregular NoC topologies.
Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Evaluation of multiple bit upset tolerant codes for NoCs buffering.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

2016
Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs.
Microprocess. Microsystems, 2016

Efficient traffic balancing for NoC routing latency minimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

2015
Preprocessing of Scenarios for Fast and Efficient Routing Reconfiguration in Fault-Tolerant NoCs.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

A fault prediction module for a fault tolerant NoC operation.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015


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