Rodrigo Cataldo

Orcid: 0000-0003-4664-2909

According to our database1, Rodrigo Cataldo authored at least 24 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
The Last-Level-Cache Interference in Guest Performance: a Case-Study with Zephyr OS.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023

2022
The Impact of Cache and Dynamic Memory Management in Static Dataflow Applications.
J. Signal Process. Syst., 2022

2021
Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization.
IEEE Trans. Parallel Distributed Syst., 2021

Using curved angular intra-frame prediction to improve video coding efficiency.
J. Vis. Commun. Image Represent., 2021

On Cache Limits for Dataflow Applications and Related Efficient Memory Management Strategies.
Proceedings of the DASIP '21: Workshop on Design and Architectures for Signal and Image Processing (14th edition), 2021

2020
Using Smart Routing for Secure and Dependable NoC-Based MPSoCs.
IEEE/ACM Trans. Netw., 2020

3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020

Multicore Parallelism Exploration Targeting 3D-HEVC Intra-Frame Prediction.
IEEE Des. Test, 2020

Broadcast Mechanism Based on Hybrid Wireless/Wired NoC for Efficient Barrier Synchronization in Parallel Computing.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Subutai : Distributed synchronization primitives for legacy and novel parallel applications. (Subutai : Primitives de synchronisation distribuées pour applications parallèles antérieures et émergentes).
PhD thesis, 2019

CDMA-based multiple multicast communications on WiNOC for efficient parallel computing.
Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip, 2019

2018
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Least-Squares Approximation Surfaces for High Quality Intra-Frame Prediction in Future Video Standards.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018

Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications.
Proceedings of the 55th Annual Design Automation Conference, 2018

2016
A security aware routing approach for NoC-based MPSoCs.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Architectural exploration of Last-Level Caches targeting homogeneous multicore systems.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

Efficient traffic balancing for NoC routing latency minimization.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

3D-HEVC depth maps intra prediction complexity analysis.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark.
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015
OcNoC: Efficient One-Cycle Router Implementation for 3D Mesh Network-on-Chip.
Proceedings of the 28th International Conference on VLSI Design, 2015

Task partitioning optimization algorithm for energy saving and load balance on NoC-based MPSoCs.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2014
Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014

The impact of routing arbitration mechanisms on 3D NoC latency.
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014


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