Jarbas Silveira

According to our database, Jarbas Silveira authored at least 32 papers between 2014 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A Triple Burst Error Correction Based on Region Selection Code.

Felipe G. A. e Silva, Alan Cadore Pinheiro, Jarbas A. N. Silveira, César A. M. Marcon

IEEE Trans. Very Large Scale Integr. Syst., August, 2023

Exploration and Analysis of Combinations of Hamming Codes in 32-bit Memories.

David C. C. Freitas, David F. M. Mota, Clailton Lopes, Daniel Simões, Jarbas Silveira, João Cesar M. Mota, César A. M. Marcon

CoRR, 2023

Memory Controller with Adaptive ECC for Reliable System Operation.

Marco P. Stefani, César A. M. Marcon, Felipe G. A. e Silva, Jarbas Silveira

Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023

Blockchain Applied In Decentralization of Ground Stations To Educational Nanosatellites.

Edilson Filho, Jarbas Silveira, César A. M. Marcon

Proceedings of the 24th IEEE Latin American Test Symposium, 2023

2022

OPCoSA: an Optimized Product Code for space applications.

David C. C. Freitas, Jarbas Silveira, César A. M. Marcon, Lirida A. B. Naviner, João Cesar M. Mota

Integr., 2022

Expanding Column Line Code Adaptive (CLC-A) for Protecting 32-and 64-Bit Data.

Felipe G. A. e Silva, Adahil Muniz, Marco P. Stefani, Jarbas Silveira, César A. M. Marcon

IEEE Des. Test, 2022

Impact of failures in a MPSoC with shared coprocessors to extend the RISC-V ISA.

Jorge Reis, Jarbas Silveira, César A. M. Marcon

Proceedings of the 11th Latin-American Symposium on Dependable Computing, 2022

2021

Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization.

Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Jarbas Silveira, Gustavo Sanchez, Johanna Sepúlveda, César A. M. Marcon, Jean-Philippe Diguet

IEEE Trans. Parallel Distributed Syst., 2021

LPC: An Error Correction Code for Mitigating Faults in 3D Memories.

David C. C. Freitas, David F. M. Mota, César A. M. Marcon, Jarbas A. N. Silveira, João Cesar M. Mota

IEEE Trans. Computers, 2021

2020

Optimized buffer protection for network-on-chip based on Error Correction Code.

Alan Cadore Pinheiro, Daniel A. B. Tavares, Felipe G. A. e Silva, Jarbas Silveira, César A. M. Marcon

Microelectron. J., 2020

PCoSA: A product error correction code for use in memory devices targeting space applications.

David C. C. Freitas, David F. M. Mota, Roger C. Goerl, César A. M. Marcon, Fabian Vargas, Jarbas A. N. Silveira, João Cesar M. Mota

Integr., 2020

CLC-A: An Adaptive Implementation of the Column Line Code (CLC) ECC.

Felipe G. A. e Silva, Adahil Muniz, Jarbas Silveira, César A. M. Marcon

Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020

Optimizing RISC-V ISA Usage by Sharing Coprocessors on MPSoC.

Pedro Lima, Caio Vieira, Jorge Reis, Alexandre Almeida, Jarbas Silveira, Roger C. Goerl, César A. M. Marcon

Proceedings of the IEEE Latin-American Test Symposium, 2020

MMS: A Software for Error Monitoring in Memories Protected by ECC.

Moabe F. Domingos, George H. Castro, Jarbas Silveira, Felipe G. A. e Silva, M. K. D. Pereira, Pedro Lima

Proceedings of the IEEE Latin-American Test Symposium, 2020

Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions.

David C. C. Freitas, David F. M. Mota, Daniel Simões, Clailton Lopes, Roger C. Goerl, César Augusto Missio Marcon, Jarbas A. N. Silveira, João Cesar M. Mota

Proceedings of the 21st International Symposium on Quality Electronic Design, 2020

2019

Performance Analysis of Depth Intra-Coding in 3D-HEVC.

Gustavo Sanchez, Jarbas Silveira, Luciano Volcan Agostini, César A. M. Marcon

IEEE Trans. Circuits Syst. Video Technol., 2019

PHICC: an error correction code for memory devices.

Philippe de S. Magalhães, Otávio Alcântara de Lime Jr., Jarbas Silveira

Proceedings of the 32nd Symposium on Integrated Circuits and Systems Design, 2019

Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications.

Alan Cadore Pinheiro, Jarbas A. N. Silveira, Daniel A. B. Tavares, Felipe G. A. e Silva, César A. M. Marcon

Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019

2018

An Extensible Code for Correcting Multiple Cell Upset in Memory Arrays.

Felipe G. A. e Silva, Jardel Silveira, Jarbas Silveira, César A. M. Marcon, Fabian Vargas, Otávio Alcântara de Lima Jr.

J. Electron. Test., 2018

2017

An efficient, low-cost ECC approach for critical-application memories.

Felipe G. A. e Silva, Otávio A. de Lima, Walter da C. Freitas, Fabian Vargas, Jarbas Silveira, César A. M. Marcon

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Latency reduction of fault-tolerant NoCs by employing multiple paths.

Ronaldo T. P. Milfont, Rafael Goncalves Mota, João Marcelo Ferreira, Paulo César Cortez, César A. M. Marcon, Daniel A. B. Tavares, Jarbas A. N. Silveira

Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017

Analysis of routing algorithms generation for irregular NoC topologies.

Ronaldo Milfont, Paulo Cortez, Alan Cadore Pinheiro, Joao Marcelo Ferreira, Jarbas Silveira, Rafael Mota, César A. M. Marcon

Proceedings of the 18th IEEE Latin American Test Symposium, 2017

Evaluation of multiple bit upset tolerant codes for NoCs buffering.

Felipe G. A. e Silva, Walter Magalhaes, Jarbas Silveira, Joao Marcelo Ferreira, Philippe de S. Magalhães, Otávio A. de Lima, César A. M. Marcon

Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

2016

Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs.

Jarbas Silveira, César A. M. Marcon, Paulo Cortez, Giovanni Cordeiro Barroso, Joao Marcelo Ferreira, Rafael Mota

Microprocess. Microsystems, 2016

A security aware routing approach for NoC-based MPSoCs.

Ramon Fernandes, César A. M. Marcon, Rodrigo Cataldo, Jarbas Silveira, Georg Sigl, Martha Johanna Sepúlveda

Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016

A correction code for multiple cells upsets in memory devices for space applications.

Helano de S. Castro, Jarbas A. N. da Silveira, Alexandre A. P. Coelho, Felipe G. A. e Silva, Philippe de S. Magalhães, Otávio A. de Lima

Proceedings of the 14th IEEE International New Circuits and Systems Conference, 2016

Efficient traffic balancing for NoC routing latency minimization.

Joao Marcelo Ferreira, Jarbas Silveira, Jardel Silveira, Rodrigo Cataldo, Thais Webber, Fernando Gehm Moraes, César A. M. Marcon

Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

Efficient routing table minimization for fault-tolerant irregular Network-on-Chip.

Rafael Goncalves Mota, Jarbas Silveira, Jardel Silveira, Lucas Brahm, Avelino F. Zorzo, Filipo Novo Mor, César A. M. Marcon

Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016

2015

Smart Reconfiguration Approach for Fault-Tolerant NoC Based MPSoCs.

Jarbas Silveira, Paulo Cortez, Alan Cadore Pinheiro, Rafael Mota, César A. M. Marcon, Lucas Brahm, Ramon Fernandes

Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015

Preprocessing of Scenarios for Fast and Efficient Routing Reconfiguration in Fault-Tolerant NoCs.

Jarbas Silveira, César A. M. Marcon, Paulo Cortez, Giovanni Cordeiro Barroso, Joao Marcelo Ferreira, Rafael Mota

Proceedings of the 23rd Euromicro International Conference on Parallel, 2015

A fault prediction module for a fault tolerant NoC operation.

Jarbas Silveira, Mathieu Bodin, Joao Marcelo Ferreira, Alan Cadore Pinheiro, Thais Webber, César A. M. Marcon

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2014

Employing a Timed Colored Petri Net to accomplish an accurate model for Network-on-Chip performance evaluation.

Jarbas Silveira, Paulo César Cortez, Giovanni Cordeiro Barroso, César A. M. Marcon

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014