César A. M. Marcon
Orcid: 0000-0002-7811-7896
According to our database1,
César A. M. Marcon
authored at least 133 papers
between 1993 and 2023.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
Online presence:
-
on orcid.org
On csauthors.net:
Bibliography
2023
IEEE Trans. Very Large Scale Integr. Syst., August, 2023
CoRR, 2023
Proceedings of the 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design, 2023
Blockchain Applied In Decentralization of Ground Stations To Educational Nanosatellites.
Proceedings of the 24th IEEE Latin American Test Symposium, 2023
Proceedings of the 16th International Joint Conference on Biomedical Engineering Systems and Technologies, 2023
Proceedings of the 16th International Joint Conference on Biomedical Engineering Systems and Technologies, 2023
2022
Configurable Fast Block Partitioning for VVC Intra Coding Using Light Gradient Boosting Machine.
IEEE Trans. Circuits Syst. Video Technol., 2022
IEEE Des. Test, 2022
Proceedings of the 11th Latin-American Symposium on Dependable Computing, 2022
Proceedings of the IEEE International Symposium on Circuits and Systems, 2022
2021
IEEE Trans. Parallel Distributed Syst., 2021
IEEE Trans. Computers, 2021
J. Vis. Commun. Image Represent., 2021
Fast block partitioning scheme for chrominance intra prediction of versatile video coding standard.
J. Electronic Imaging, 2021
A Trajectory Inference-based Technique for Energy Efficient Store-and-Forward Technology.
Proceedings of the 2021 Wireless Days, 2021
Proceedings of the International Conference on Visual Communications and Image Processing, 2021
Proceedings of the International Conference on Visual Communications and Image Processing, 2021
Chronos: An Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution.
Proceedings of the 12th IEEE Latin America Symposium on Circuits and System, 2021
Proceedings of the Human Aspects of IT for the Aged Population. Supporting Everyday Life Activities, 2021
2020
IEEE/ACM Trans. Netw., 2020
IEEE Trans. Circuits Syst. Video Technol., 2020
3D-HEVC Bipartition Modes Encoder and Decoder Design Targeting High-Resolution Videos.
IEEE Trans. Circuits Syst. I Regul. Pap., 2020
Tile Adaptation for Workload Balancing of 3D-HEVC Encoder in Homogeneous Multicore Systems.
IEEE Trans. Circuits Syst. I Fundam. Theory Appl., 2020
Microelectron. J., 2020
J. Real Time Image Process., 2020
PCoSA: A product error correction code for use in memory devices targeting space applications.
Integr., 2020
IEEE Des. Test, 2020
Proceedings of the 33rd Symposium on Integrated Circuits and Systems Design, 2020
Proceedings of the IEEE Latin-American Test Symposium, 2020
Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions.
Proceedings of the 21st International Symposium on Quality Electronic Design, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the IEEE International Conference on Image Processing, 2020
Proceedings of the 27th IEEE International Conference on Electronics, Circuits and Systems, 2020
2019
IEEE Trans. Circuits Syst. Video Technol., 2019
Signal Image Video Process., 2019
Enterp. Inf. Syst., 2019
Proceedings of the 10th IEEE Latin American Symposium on Circuits & Systems, 2019
TITAN: Tile Timing-Aware Balancing Algorithm for Speeding Up the 3D-HEVC Intra Coding.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019
2018
A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction.
J. Vis. Commun. Image Represent., 2018
J. Electron. Test., 2018
Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 31st Symposium on Integrated Circuits and Systems Design, 2018
Proceedings of the 33rd Annual ACM Symposium on Applied Computing, 2018
Proceedings of the 9th IEEE Latin American Symposium on Circuits & Systems, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm.
Proceedings of the 2018 IEEE International Conference on Image Processing, 2018
Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Least-Squares Approximation Surfaces for High Quality Intra-Frame Prediction in Future Video Standards.
Proceedings of the 25th IEEE International Conference on Electronics, Circuits and Systems, 2018
Proceedings of the 2018 IEEE International Conference on Acoustics, 2018
Subutai: distributed synchronization primitives in NoC interfaces for legacy parallel-applications.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
Microelectron. J., 2017
J. Real Time Image Process., 2017
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017
A security-aware routing implementation for dynamic data protection in zone-based MPSoC.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017
Low-area scalable hardware architecture for DMM-1 encoder of 3D-HEVC video coding standard.
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, 2017
Proceedings of the Symposium on Applied Computing, 2017
Proceedings of the 18th IEEE Latin American Test Symposium, 2017
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017
Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2017
Proceedings of the 25th European Signal Processing Conference, 2017
Proceedings of the 25th European Signal Processing Conference, 2017
2016
Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs.
Microprocess. Microsystems, 2016
DFPS: a fast pattern selector for depth modeling mode 1 in three-dimensional high-efficiency video coding standard.
J. Electronic Imaging, 2016
Energy-aware light-weight DMM-1 patterns decoders with efficiently storage in 3D-HEVC.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Architectural exploration of Last-Level Caches targeting homogeneous multicore systems.
Proceedings of the 29th Symposium on Integrated Circuits and Systems Design, 2016
Proceedings of the 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016
Proceedings of the 13th IEEE International Conference on Networking, Sensing, and Control, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
Proceedings of the 2016 IEEE International Conference on Electronics, Circuits and Systems, 2016
2015
Proceedings of the 28th International Conference on VLSI Design, 2015
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 2015
Preprocessing of Scenarios for Fast and Efficient Routing Reconfiguration in Fault-Tolerant NoCs.
Proceedings of the 23rd Euromicro International Conference on Parallel, 2015
Task partitioning optimization algorithm for energy saving and load balance on NoC-based MPSoCs.
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015
Differential Evolution on a GPGPU: The Influence of Parameters on Speedup and the Quality of Solutions.
Proceedings of the 2015 IEEE International Parallel and Distributed Processing Symposium Workshop, 2015
Proceedings of the 2015 IEEE International Conference on Electronics, 2015
2014
J. Syst. Archit., 2014
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization.
Proceedings of the 2014 27th International Conference on VLSI Design, 2014
Employing a Timed Colored Petri Net to accomplish an accurate model for Network-on-Chip performance evaluation.
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014
Proceedings of the 21st IEEE International Conference on Electronics, Circuits and Systems, 2014
2013
Lasio 3D NoC vertical links serialization: Evaluation of latency and buffer occupancy.
Proceedings of the 26th Symposium on Integrated Circuits and Systems Design, 2013
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013
Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013
2012
Proceedings of the 2012 Brazilian Symposium on Computing System Engineering, 2012
Proceedings of the 2012 Brazilian Symposium on Computing System Engineering, 2012
Exploiting Modbus Protocol in Wired and Wireless Multilevel Communication Architecture.
Proceedings of the 2012 Brazilian Symposium on Computing System Engineering, 2012
Proceedings of the 25th Symposium on Integrated Circuits and Systems Design, 2012
Proceedings of the 23rd IEEE International Symposium on Rapid System Prototyping, 2012
Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC.
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
2011
CAFES: A framework for intrachip application modeling and communication architecture design.
J. Parallel Distributed Comput., 2011
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011
Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time.
Proceedings of the 22nd IEEE International Symposium on Rapid System Prototyping, 2011
Proceedings of the 4th International Workshop on Network on Chip Architectures, 2011
Proceedings of the Design, Automation and Test in Europe, 2011
2009
Proceedings of the 2008 IEEE International Symposium on System-on-Chip, 2009
2008
IET Comput. Digit. Tech., 2008
High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping.
Proceedings of the 19th IEEE/IFIP International Symposium on Rapid System Prototyping: RSP 2009, 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
2007
Proceedings of the IFIP VLSI-SoC 2007, 2007
Proceedings of the IFIP VLSI-SoC 2007, 2007
Proceedings of the 20th Annual Symposium on Integrated Circuits and Systems Design, 2007
Proceedings of the 18th IEEE International Workshop on Rapid System Prototyping (RSP 2007), 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007
2006
Proceedings of the 17th IEEE International Workshop on Rapid System Prototyping (RSP 2006), 2006
2005
Modelos para o mapeamento de aplicações em infra-estruturas de comunicação intrachip.
PhD thesis, 2005
Proceedings of the VLSI-SoC: From Systems To Silicon, 2005
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Design space exploration comparing homogeneous and heterogeneous network-on-chip architectures.
Proceedings of the 18th Annual Symposium on Integrated Circuits and Systems Design, 2005
Proceedings of the 16th IEEE International Workshop on Rapid System Prototyping (RSP 2005), 2005
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005
2004
Proceedings of the 15th IEEE International Workshop on Rapid System Prototyping (RSP 2004), 2004
2002
Proceedings of the 15th Annual Symposium on Integrated Circuits and Systems Design, 2002
Proceedings of the Seventh IEEE International High-Level Design Validation and Test Workshop 2002, 2002
1993
Microprocess. Microprogramming, 1993