Jochen Mades

According to our database1, Jochen Mades authored at least 10 papers between 1999 and 2020.

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Bibliography

2020
TLS-Level Security for Low Power Industrial IoT Network Infrastructures.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

2003
Strukturelle Konsistenz und Regularisierung von VHDL-AMS-Modellen.
PhD thesis, 2003

2002
A discrete algorithm for the regularization of hierarchical VHDL-AMS models.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Regularization of hierarchical VHDL-AMS models using bipartite graphs.
Proceedings of the 39th Design Automation Conference, 2002

2001
Concept of a Joint University/Industry Course for Mixed-Signal System-On-Chip Design.
Proceedings of the 2001 International Conference on Microelectronics Systems Education, 2001

2000
Eine flexible Simulationsumgebung für System-On-Chip Design (A Flexible Simulation Environment for System-On-Chip Design).
Informationstechnik Tech. Inform., 2000

A JAVA-Based Mixed-Signal Design Environment.
Proceedings of the 13th Annual Symposium on Integrated Circuits and Systems Design, 2000

VXML: VHDL Hardware Design Representation in XML.
Proceedings of the Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Frankfurt, Germany, February 28, 2000

An Open VHDL-AMS Simulation Framework.
Proceedings of the 2000 IEEE/ACM International Workshop on Behavioral Modeling and Simulation, 2000

1999
A scalable multithreaded compiler front-end.
Proceedings of the Parallel Computing: Fundamentals & Applications, 1999


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