Johannes Fellner

According to our database, Johannes Fellner authored at least 6 papers between 2004 and 2022.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2022

Automated testing of ARM Cortex based SoC with I3C interface and temperature sensor.

Mario Golubic, Jurica Kundrata, Ivan Skeledzija, Dimitri Ciaglia, Nicolas Pages, Johannes Fellner, Adrijan Baric

Proceedings of the 45th Jubilee International Convention on Information, 2022

2020

Programmable low-frequency divider in 180-nm CMOS technology.

Dubravko Tomic, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Adrijan Baric

Proceedings of the 43rd International Convention on Information, 2020

Design of a tunable temperature coefficient voltage reference with low-dropout voltage regulator in 180-nm CMOS technology.

David Osmanovic, Ivan Skeledzija, Kresimir Spoljaric, Domagoj Tomic, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Adrijan Baric

Proceedings of the 43rd International Convention on Information, 2020

Design and measurements of low power 32-kHz oscillators and a test interface in 180-nm CMOS technology.

Ivan Kuljak, Ivan Tomic, Roman Bertolan, Josip Mikulic, Gregor Schatzberger, Johannes Fellner, Adrijan Baric

Proceedings of the 43rd International Convention on Information, 2020

2005

A one time programming cell using more than two resistance levels of a polyfuse.

Johannes Fellner

Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005

2004

Extraction of material parameters based on inverse modeling of three-dimensional interconnect fusing structures.

Stefan Holzer, Rainer Minixhofer, Clemens Heitzinger, Johannes Fellner, Tibor Grasser, Siegfried Selberherr

Microelectron. J., 2004