Jong-Kwan Woo

According to our database1, Jong-Kwan Woo authored at least 15 papers between 2009 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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In proceedings 
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PhD thesis 
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Links

On csauthors.net:

Bibliography

2018
Error Contributions during MEMS Gyroscope Calibration by Chip-Scale Micro-Stage with Capacitive Motion Sensor.
Proceedings of the 2018 IEEE/ASME International Conference on Advanced Intelligent Mechatronics, 2018

2016
Modeling and calibration of a capacitive threshold sensor for in situ calibration of MEMS gyroscope.
Proceedings of the IEEE International Conference on Advanced Intelligent Mechatronics, 2016

2015
A 9-bit, 110-MS/s pipelined-SAR ADC using time-interleaved technique with shared comparator.
Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

2014
1.2 V 10-bit 75 MS/s Pipelined ADC With Phase-Dependent Gain-Transition CDS.
IEEE Trans. Very Large Scale Integr. Syst., 2014

2013
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

High-resolution and wide-dynamic range time-to-digital converter with a multi-phase cyclic Vernier delay line.
Proceedings of the ESSCIRC 2013, 2013

2012
Power-Gating Noise Minimization by Three-Step Wake-Up Partitioning.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

2011
A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

A comparator-based cyclic analog-to-digital converter with boosted preset voltage.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

A CMOs readout integrated circuit with wide dynamic range for a CNT bio-sensor array system.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

A low-power referenceless clock and data recovery circuit with clock-edge modulation for biomedical sensor applications.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2010
A 14.6 ps Resolution, 50 ns Input-Range Cyclic Time-to-Digital Converter Using Fractional Difference Conversion Method.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010

Charge Amplifier With an Enhanced Frequency Response for SPM-Based Data Storage.
IEEE Trans. Circuits Syst. II Express Briefs, 2010

A high-resolution and fast-conversion readout circuit for differential capacitive sensors.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010

2009
High-speed 10-bit LCD column driver with a split DAC and a class-AB output buffer.
IEEE Trans. Consumer Electron., 2009


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