Manho Kim

According to our database1, Manho Kim authored at least 9 papers between 2005 and 2011.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Other 

Links

On csauthors.net:

Bibliography

2011
A Low-Cost and Low-Power Time-to-Digital Converter Using Triple-Slope Time Stretching.
IEEE Trans. Circuits Syst. II Express Briefs, 2011

2010
A fast-acquisition PLL using split half-duty sampled feedforward loop filter.
IEEE Trans. Consumer Electron., 2010

2009
A high resolution capacitance deviation-to-digital converter utilizing time stretching.
Proceedings of the Annual IEEE International SoC Conference, SoCC 2009, 2009

2006
Network-on-chip link analysis under power and performance constraints.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

NIUGAP: low latency network interface architecture with Gray code for networks-on-chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Network-on-chip quality-of-service through multiprotocol label switching.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

DCOS: cache embedded switch architecture for distributed shared memory multiprocessor SoCs.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Parallel FFT computation with a CDMA-based network-on-chip.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

FPGA-Based CDMA Switch for Networks-on-Chip.
Proceedings of the 13th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2005), 2005


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