Woo-Yeol Shin

According to our database1, Woo-Yeol Shin authored at least 8 papers between 2010 and 2016.

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Bibliography

2016
18.4 An 1.1V 68.2GB/s 8Gb Wide-IO2 DRAM with non-contact microbump I/O test scheme.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

2015
A 1.74mW/GHz 0.11-2.5GHz fast-locking, jitter-reducing, 180° phase-shift digital DLL with a window phase detector for LPDDR4 memory controllers.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2013
A 10-Mbps 0.8-pJ/bit Referenceless Clock and Data Recovery Circuit for Optically Controlled Neural Interface System.
IEEE Trans. Circuits Syst. II Express Briefs, 2013

2012
Static-switching pulse domino: A switching-aware design technique for wide fan-in dynamic multiplexers.
Integr., 2012

2011
A 4.8Gb/s impedance-matched bidirectional multi-drop transceiver for high-capacity memory interface.
Proceedings of the IEEE International Solid-State Circuits Conference, 2011

A low-power referenceless clock and data recovery circuit with clock-edge modulation for biomedical sensor applications.
Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011

2010
A fast-acquisition PLL using split half-duty sampled feedforward loop filter.
IEEE Trans. Consumer Electron., 2010

A 14.6 ps Resolution, 50 ns Input-Range Cyclic Time-to-Digital Converter Using Fractional Difference Conversion Method.
IEEE Trans. Circuits Syst. I Regul. Pap., 2010


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