Daejeong Kim

According to our database1, Daejeong Kim authored at least 14 papers between 1995 and 2017.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
A spread-spectrum clock generator with direct VCO modulation in open-loop.
IEICE Electron. Express, 2017

Multiple-output LDO regulator applying with constant feedback factor.
Proceedings of the International SoC Design Conference, 2017

2014
Delay-based clock generator with edge transmission and reset.
IEICE Electron. Express, 2014

Analysis of switching frequency variation in self-oscillating class-D audio amplifiers.
IEICE Electron. Express, 2014

2011
Phase-shift self-oscillating class-D audio amplifier with multiple-pole feedback filter.
IEICE Electron. Express, 2011

2010
Multi-stage variable gain amplifier for low-voltage CCD analog-front end using CDA technique.
IEICE Electron. Express, 2010

Programmable pulsewidth control loop (PWCL) in dual-slope combination.
IEICE Electron. Express, 2010

2009
A Multiphase Generator Based on VCDR (Voltage-Controlled Variable Delay Ring).
IEICE Trans. Electron., 2009

Piecewise linear-in-dB variable gain amplifier to enhance integral nonlinearity.
IEICE Electron. Express, 2009

Negative charge pump circuit with large output current and high power efficiency.
IEICE Electron. Express, 2009

2008
A Modified Dickson Charge Pump Circuit with High Efficiency and High Output Voltage.
IEICE Trans. Electron., 2008

2005
Row-by-Row Dynamic Source-Line Voltage Control (RRDSV) Scheme for Two Orders of Magnitude Leakage Current Reduction of Sub-1-V-<i>V<sub>DD</sub></i> SRAM's.
IEICE Trans. Electron., 2005

2004
A large-current-output boosted voltage generator with non-overlapping clock control for sub-1-V memory applications.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

1995
A single chip iΔ-Σ ADC with a built-in variable gain stage and DAC with a charge integrating subconverter for a 5 V 9600-b/s modem.
IEEE J. Solid State Circuits, August, 1995


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