Jörg E. Vollrath

According to our database1, Jörg E. Vollrath authored at least 16 papers between 1997 and 2018.

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Bibliography

2018
Open Access Microelectronics Course.
Proceedings of the 12th European Workshop on Microelectronics Education, 2018

2015
An open access minimum automatic task generation live feedback system for electrical engineering.
Proceedings of the IEEE Global Engineering Education Conference, 2015

2014
Interactive tools for teaching electrical engineering.
Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014

2013
Using models, simulation and measurements for teaching circuit design.
Proceedings of the IEEE Global Engineering Education Conference, 2013

2006
DDR2 DRAM Output Timing Optimization.
Proceedings of the 14th IEEE International Workshop on Memory Technology, 2006

DRAM-Specific Space of Memory Tests.
Proceedings of the 2006 IEEE International Test Conference, 2006

2005
Investigations of Faulty DRAM Behavior Using Electrical Simulation Versus an Analytical Approach.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2003
Testing and Characterization of SDRAMs.
IEEE Des. Test Comput., 2003

Output Timing Measurement Using an Idd Method.
Proceedings of the 11th IEEE International Workshop on Memory Technology, 2003

2002
Signal Margin Analysis for Memory Sense Amplifiers .
Proceedings of the 1st IEEE International Workshop on Electronic Design, 2002

2001
Compressed Bit Fail Maps for Memory Fail Pattern Classification.
J. Electron. Test., 2001

Pseudo fail bit map generation for RAMs during component test and burn-in in a manufacturing environment.
Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

2000
Synchronous Dynamic Memory Test Construction: A Field Approach.
Proceedings of the 8th IEEE International Workshop on Memory Technology, 2000

1999
Tutorial: Characterizing SDRAMS.
Proceedings of the 7th IEEE International Workshop on Memory Technology, 1999

1998
Power Analysis of DRAMs.
Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997
Cell Signal Measurement for High-Density DRAMs.
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997


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