Joseph Sweeney

According to our database, Joseph Sweeney authored at least 13 papers between 2017 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2024

Quantifying the Efficacy of Logic Locking Methods.

Joseph Sweeney, Deepali Garg, Lawrence T. Pileggi

Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

PolyTracker: Whole-Input Dynamic Information Flow Tracing.

Evan Sultanik, Marek Surovic, Henrik Brodin, Kelly Kaoudis, Facundo Tuesca, Carson Harmon, Lisa Overall, Joseph Sweeney, Bradford Larsen

Proceedings of the 33rd ACM SIGSOFT International Symposium on Software Testing and Analysis, 2024

2021

Obfuscation and Security for Digital Integrated Circuits.

Joseph Sweeney

PhD thesis, 2021

Split-Chip Design to Prevent IP Reverse Engineering.

Samuel Pagliarini, Joseph Sweeney, Ken Mai, R. D. Shawn Blanton, Larry T. Pileggi, Subhasish Mitra

IEEE Des. Test, 2021

Microfluidic-based Bacterial Molecular Computing on a Chip.

Daniel P. Martins, Michael Taynnan Barros, Benjamin O'Sullivan, Ian Seymour, Alan O'Riordan, Lee Coffey, Joseph Sweeney, Sasitharan Balasubramaniam

CoRR, 2021

Hardware Redaction via Designer-Directed Fine-Grained eFPGA Insertion.

Prashanth Mohan, Oguz Atli, Joseph Sweeney, Onur O. Kibar, Larry T. Pileggi, Ken Mai

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2021

2020

A Method to Account for Personnel Risk Attitudes in System Design and Maintenance Activity Development.

Benjamin W. Rathwell, Douglas L. Van Bossuyt, Anthony G. Pollman, Joseph Sweeney

Syst., 2020

CircuitGraph: A Python package for Boolean circuits.

Joseph Sweeney, Ruben Purdy, Ronald D. Blanton, Lawrence T. Pileggi

J. Open Source Softw., 2020

Securing Digital Systems via Split-Chip Obfuscation.

Joseph Sweeney, Samuel Pagliarini, Lawrence T. Pileggi

CoRR, 2020

Sensitivity Analysis of Locked Circuits.

Joseph Sweeney, Marijn Heule, Lawrence T. Pileggi

Proceedings of the LPAR 2020: 23rd International Conference on Logic for Programming, 2020

Modeling Techniques for Logic Locking.

Joseph Sweeney, Marijn J. H. Heule, Lawrence T. Pileggi

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

Latch-Based Logic Locking.

Joseph Sweeney, V. Mohammed Zackriya, Samuel Pagliarini, Lawrence T. Pileggi

Proceedings of the 2020 IEEE International Symposium on Hardware Oriented Security and Trust, 2020

2017

A self-calibrating sense amplifier for a true random number generator using hybrid FinFET-straintronic MTJ.

Sudipta Bhuin, Joseph Sweeney, Samuel Pagliarini, Ayan Kumar Biswas, Lawrence T. Pileggi

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2017