Subhasish Mitra
Orcid: 0000-0002-5572-5194
According to our database1,
Subhasish Mitra
authored at least 249 papers
between 1997 and 2023.
Collaborative distances:
Collaborative distances:
Awards
ACM Fellow
ACM Fellow 2014, "For contributions to the design and testing of robust computing systems.".
IEEE Fellow
IEEE Fellow 2013, "For contributions to design and test of robust integrated circuits".
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2023
Micro/Nano Circuits and Systems Design and Design Automation: Challenges and Opportunities.
Proc. IEEE, June, 2023
An Exhaustive Approach to Detecting Transient Execution Side Channels in RTL Designs of Processors.
IEEE Trans. Computers, 2023
Foundry Monolithic 3D BEOL Transistor + Memory Stack: Iso-performance and Iso-footprint BEOL Carbon Nanotube FET+RRAM vs. FEOL Silicon FET+RRAM.
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023
Efficient Modeling and Calibration of Multi-Electrode Stimuli for Epiretinal Implants.
Proceedings of the 11th International IEEE/EMBS Conference on Neural Engineering, 2023
Proceedings of the 11th International IEEE/EMBS Conference on Neural Engineering, 2023
Proceedings of the International Symposium on Memory Systems, 2023
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Dendrite-inspired Computing to Improve Resilience of Neural Networks to Faults in Emerging Memory Technologies.
Proceedings of the IEEE International Conference on Rebooting Computing, 2023
Proceedings of the IEEE/ACM International Conference on Computer Aided Design, 2023
EMBER: A 100 MHz, 0.86 mm<sup>2</sup>, Multiple-Bits-per-Cell RRAM Macro in 40 nm CMOS with Compact Peripherals and 1.0 pJ/bit Read Circuitry.
Proceedings of the 49th IEEE European Solid State Circuits Conference, 2023
Ultra-Dense 3D Physical Design Unlocks New Architectural Design Points with Large Benefits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
G-QED: Generalized QED Pre-silicon Verification beyond Non-Interfering Hardware Accelerators.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications.
IEEE Micro, 2022
CHIMERA: A 0.92-TOPS, 2.2-TOPS/W Edge AI Accelerator With 2-MByte On-Chip Foundry Resistive RAM for Efficient Training and Inference.
IEEE J. Solid State Circuits, 2022
Innovating at Speed and at Scale: A Next Generation Infrastructure for Accelerating Semiconductor Technologies.
CoRR, 2022
Proceedings of the IEEE International Test Conference, 2022
2021
Effective Pre-Silicon Verification of Processor Cores by Breaking the Bounds of Symbolic Quick Error Detection.
CoRR, 2021
Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition.
Proceedings of the Formal Methods in Computer Aided Design, 2021
2020
Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020
Reconfigurable tiles of computing-in-memory SRAM architecture for scalable vectorization.
Proceedings of the ISLPED '20: ACM/IEEE International Symposium on Low Power Electronics and Design, 2020
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020
Proceedings of the 2020 Formal Methods in Computer Aided Design, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
A Formal Approach for Detecting Vulnerabilities to Transient Execution Attacks in Out-of-Order Processors.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
DECOY: DEflection-Driven HLS-Based Computation Partitioning for Obfuscating Intellectual PropertY.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
2019
Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019
IEEE Trans. Biomed. Circuits Syst., 2019
Proceedings of the 27th IFIP/IEEE International Conference on Very Large Scale Integration, 2019
Proceedings of the 2019 9th International IEEE/EMBS Conference on Neural Engineering (NER), 2019
A 43pJ/Cycle Non-Volatile Microcontroller with 4.7μs Shutdown/Wake-up Integrating 2.3-bit/Cell Resistive RAM and Resilience Techniques.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019
Unlocking the Power of Formal Hardware Verification with CoSA and Symbolic QED: Invited Paper.
Proceedings of the International Conference on Computer-Aided Design, 2019
Symbolic QED Pre-silicon Verification for Automotive Microcontroller Cores: Industrial Case Study.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Review of Methodologies for Pre- and Post-Silicon Analog Verification in Mixed-Signal SOCs.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Processor Hardware Security Vulnerabilities and their Detection by Unique Program Execution Checking.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2019
Proceedings of the 56th Annual Design Automation Conference 2019, 2019
2018
Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience).
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018
Hyperdimensional Computing Exploiting Carbon Nanotube FETs, Resistive RAM, and Their Monolithic 3D Integration.
IEEE J. Solid State Circuits, 2018
Proceedings of the 2018 International Symposium on VLSI Design, 2018
Brain-inspired computing exploiting carbon nanotube FETs and resistive RAM: Hyperdimensional computing case study.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018
ETISS-ML: A multi-level instruction set simulator with RTL-level fault injection support for the evaluation of cross-layer resiliency techniques.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
Symbolic quick error detection using symbolic initial state for pre-silicon verification.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
TRIG: hardware accelerator for inference-based applications and experimental demonstration using carbon nanotube FETs.
Proceedings of the 55th Annual Design Automation Conference, 2018
2017
IEEE Trans. Circuits Syst. I Regul. Pap., 2017
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017
Introduction to the January Special Issue on the 2016 IEEE International Solid-State Circuits Conference.
IEEE J. Solid State Circuits, 2017
CoRR, 2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
Proceedings of the 54th Annual Design Automation Conference, 2017
3D nanosystems enable <i>embedded</i> abundant-data computing: special session paper.
Proceedings of the Twelfth IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis Companion, 2017
E-QED: Electrical Bug Localization During Post-silicon Validation Enabled by Quick Error Detection and Formal Methods.
Proceedings of the Computer Aided Verification - 29th International Conference, 2017
ASP-DAC 2017 keynote speech I: In memory of Edward J. McCluskey: The next wave of pioneering innovations.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017
2016
IEEE Trans. Circuits Syst. I Regul. Pap., 2016
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016
Symbolic Quick Error Detection for Pre-Silicon and Post-Silicon Validation: Frequently Asked Questions.
IEEE Des. Test, 2016
Proceedings of the International Conference on Embedded Computer Systems: Architectures, 2016
Proceedings of the 17th Latin-American Test Symposium, 2016
Session 24 overview: Ultra-efficient computing: Application-inspired and analog-assisted digital.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016
Clear: c̲ross-l̲ayer e̲xploration for a̲rchitecting r̲esilience combining hardware and software techniques to tolerate soft errors in processor cores.
Proceedings of the 53rd Annual Design Automation Conference, 2016
Proceedings of the Eleventh IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis, 2016
2015
Rapid Co-Optimization of Processing and Circuit Design to Overcome Carbon Nanotube Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015
it Inf. Technol., 2015
A structured approach to post-silicon validation and debug using symbolic quick error detection.
Proceedings of the 2015 IEEE International Test Conference, 2015
Proceedings of the 2015 IEEE International Symposium on Circuits and Systems, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Quick error detection tests with fast runtimes for effective post-silicon validation and debug.
Proceedings of the 2015 Design, Automation & Test in Europe Conference & Exhibition, 2015
Proceedings of the 52nd Annual Design Automation Conference, 2015
Hybrid quick error detection (H-QED): accelerator validation and debug using high-level synthesis principles.
Proceedings of the 52nd Annual Design Automation Conference, 2015
Proceedings of the 20th Asia and South Pacific Design Automation Conference, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
IEEE J. Solid State Circuits, 2014
System Level Benchmarking with Yield-Enhanced Standard Cell Library for Carbon Nanotube VLSI Circuits.
ACM J. Emerg. Technol. Comput. Syst., 2014
IEEE J. Emerg. Sel. Topics Circuits Syst., 2014
Proceedings of the Technical Papers of 2014 International Symposium on VLSI Design, 2014
A new era of computing: Are you "ready now" to build a smarter and secured enterprise?
Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014
Proceedings of the International Symposium on Physical Design, 2014
Proceedings of the 2014 International Symposium on Integrated Circuits (ISIC), 2014
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
Proceedings of the 19th Asia and South Pacific Design Automation Conference, 2014
2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013
Proceedings of the 2013 IEEE International Test Conference, 2013
Self-repair of uncore components in robust system-on-chips: An OpenSPARC T2 case study.
Proceedings of the 2013 IEEE International Test Conference, 2013
Experimental demonstration of a fully digital capacitive sensor interface built entirely using carbon-nanotube FETs.
Proceedings of the 2013 IEEE International Solid-State Circuits Conference, 2013
Proceedings of the International Symposium on Low Power Electronics and Design (ISLPED), 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Rapid exploration of processing and design guidelines to overcome carbon nanotube variations.
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
Detection of early-life failures in high-K metal-gate transistors and ultra low-K inter-metal dielectrics.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013
2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012
Proceedings of the 25th International Conference on VLSI Design, 2012
Proceedings of IEEE International Conference on Communications, 2012
Nano-Electro-Mechanical relays for FPGA routing: Experimental demonstration and a design technique.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012
Proceedings of the 49th Annual Design Automation Conference 2012, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
2011
Characterization and Design of Logic Circuits in the Presence of Carbon Nanotube Density Variations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Self-Tuning for Maximized Lifetime Energy-Efficiency in the Presence of Circuit Aging.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
Characterization and Implementation of Fault-Tolerant Vertical Links for 3-D Networks-on-Chip.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
IEEE J. Emerg. Sel. Topics Circuits Syst., 2011
Proceedings of the 2011 International Workshop on System Level Interconnect Prediction, 2011
Carbon nanotube imperfection-immune digital VLSI: Frequently asked questions updated.
Proceedings of the 2011 IEEE/ACM International Conference on Computer-Aided Design, 2011
2010
Proceedings of the 28th IEEE VLSI Test Symposium, 2010
Proceedings of the 28th IEEE VLSI Test Symposium, 2010
Proceedings of the VLSI Design 2010: 23rd International Conference on VLSI Design, 2010
Proceedings of the 2011 IEEE International Test Conference, 2010
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Carbon nanotube correlation: promising opportunity for CNFET circuit yield enhancement.
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 47th Design Automation Conference, 2010
Proceedings of the 47th Design Automation Conference, 2010
2009
Probabilistic Analysis and Design of Metallic-Carbon-Nanotube-Tolerant Digital Logic Circuits.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Post-Silicon Bug Localization in Processors Using Instruction Footprint Recording and Analysis (IFRA).
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
ACM SIGOPS Oper. Syst. Rev., 2009
IEEE Des. Test Comput., 2009
Proceedings of the 27th International Conference on Computer Design, 2009
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Nanoelectromechanical (NEM) relays integrated with CMOS SRAM for improved stability and low leakage.
Proceedings of the 2009 International Conference on Computer-Aided Design, 2009
Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2009
Imperfection-immune VLSI logic circuits using Carbon Nanotube Field Effect Transistors.
Proceedings of the Design, Automation and Test in Europe, 2009
Proceedings of the 46th Design Automation Conference, 2009
Digital VLSI logic technology using Carbon Nanotube FETs: frequently asked questions.
Proceedings of the 46th Design Automation Conference, 2009
Proceedings of the IEEE Custom Integrated Circuits Conference, 2009
2008
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008
Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008
Proceedings of the 2008 IEEE International Test Conference, 2008
Proceedings of the 2008 IEEE International Test Conference, 2008
Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008
Proceedings of the 14th IEEE International On-Line Testing Symposium (IOLTS 2008), 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Dependable Embedded Systems Special Day Panel: Issues and Challenges in Dependable Embedded Systems.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Design, Automation and Test in Europe, 2008
IFRA: instruction footprint recording and analysis for post-silicon bug localization in processors.
Proceedings of the 45th Design Automation Conference, 2008
2007
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007
Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Proceedings of the 2007 IEEE International Test Conference, 2007
Carbon Nanotube Transistor Circuits: Circuit-Level Performance Benchmarking and Design Options for Living with Imperfections.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Circuit Failure Prediction Enables Robust System Design Resilient to Aging and Wearout.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
Proceedings of the 44th Design Automation Conference, 2007
2006
IEEE Trans. Very Large Scale Integr. Syst., 2006
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
Proceedings of the 25th IEEE Symposium on Reliable Distributed Systems (SRDS 2006), 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 2006 IEEE International Test Conference, 2006
Proceedings of the 12th IEEE International On-Line Testing Symposium (IOLTS 2006), 2006
2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005
IEEE Micro, 2005
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005
Proceedings of the 11th IEEE International On-Line Testing Symposium (IOLTS 2005), 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the 42nd Design Automation Conference, 2005
Proceedings of the IEEE 2005 Custom Integrated Circuits Conference, 2005
2004
Techniques and algorithms for fault grading of FPGA interconnect test configurations.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004
IEEE Trans. Computers, 2004
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004
2003
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003
Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003
Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003
2002
IEEE Trans. Computers, 2002
IEEE Trans. Computers, 2002
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Proceedings of the 20th IEEE VLSI Test Symposium (VTS 2002), Without Testing It's a Gamble, 28 April, 2002
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002
Proceedings of the Proceedings IEEE International Test Conference 2002, 2002
Proceedings of the 4th NASA / DoD Workshop on Evolvable Hardware (EH 2002), 2002
Proceedings of the 17th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2002), 2002
2001
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001
Proceedings of the 2001 International Conference on Dependable Systems and Networks (DSN 2001) (formerly: FTCS), 2001
Proceedings of the 16th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2001), 2001
2000
IEEE Des. Test Comput., 2000
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000
Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000
Proceedings of the Proceedings IEEE International Test Conference 2000, 2000
Proceedings of the 6th International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC 2000), 2000
1999
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999
1997
Proceedings of the Proceedings IEEE International Test Conference 1997, 1997