Juan A. Prieto

According to our database, Juan A. Prieto authored at least 4 papers between 1994 and 1998.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1998

DfT and on-line test of high-performance data converters: a practical case.

Eduardo J. Peralías, Adoración Rueda, Juan A. Prieto, José L. Huertas

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

An Approach to Realistic Fault Prediction and Layout Design for Testability in Analog Circuits.

Juan A. Prieto, Adoración Rueda, Ian Andrew Grout, Eduardo J. Peralías, José L. Huertas, Andrew Mark David Richardson

Proceedings of the 1998 Design, 1998

1997

A performance-driven placement algorithm with simultaneous Place&Route optimization for analog ICs.

Juan A. Prieto, Adoración Rueda, José M. Quintana, José Luis Huertas

Proceedings of the European Design and Test Conference, 1997

1994

An Algorithm for the Place-and-Route Problem in the Layout of Analog Circuits.

Juan A. Prieto, José M. Quintana, Adoración Rueda, José L. Huertas

Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994