Junhyung Um

According to our database, Junhyung Um authored at least 15 papers between 1999 and 2016.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2016

OSFA: A New Paradigm of Aging Aware Gate-Sizing for Power/Performance Optimizations Under Multiple Operating Conditions.

Subhendu Roy, Derong Liu, Jagmohan Singh, Junhyung Um, David Z. Pan

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016

2015

OSFA: a new paradigm of gate-sizing for power/performance optimizations under multiple operating conditions.

Subhendu Roy, Derong Liu, Junhyung Um, David Z. Pan

Proceedings of the 52nd Annual Design Automation Conference, 2015

2009

In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem.

Woo-Cheol Kwon, Sungjoo Yoo, Junhyung Um, Seh-Woong Jeong

Proceedings of the Design, Automation and Test in Europe, 2009

2006

Resource Sharing Combined with Layout Effects in High-Level Synthesis.

Junhyung Um, Taewhan Kim

J. VLSI Signal Process., 2006

A systematic IP and bus subsystem modeling for platform-based system design.

Junhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim

Proceedings of the Conference on Design, Automation and Test in Europe, 2006

2003

Synthesis of arithmetic circuits considering layout effects.

Junhyung Um, Taewhan Kim

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2003

An efficient inverse multiplier/divider architecture for cryptography systems.

Junhyung Um, Sangwoo Lee, Youngsoo Park, Sungik Jun, Taewhan Kim

Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design.

Junhyung Um, Taewhan Kim

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

Layout-driven resource sharing in high-level synthesis.

Junhyung Um, Jae-Hoon Kim, Taewhan Kim

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

Layout-aware synthesis of arithmetic circuits.

Junhyung Um, Taewhan Kim

Proceedings of the 39th Design Automation Conference, 2002

2001

An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits.

Junhyung Um, Taewhan Kim

IEEE Trans. Computers, 2001

2000

A practical approach to the synthesis of arithmetic circuits usingcarry-save-adders.

Taewhan Kim, Junhyung Um

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

A fine-grained arithmetic optimization technique for high-performance/low-power data path synthesis.

Junhyung Um, Taewhan Kim, C. L. Liu

Proceedings of the 37th Conference on Design Automation, 2000

A timing-driven synthesis of arithmetic circuits using carry-save-adders (short paper).

Taewhan Kim, Junhyung Um

Proceedings of ASP-DAC 2000, 2000

1999

Optimal allocation of carry-save-adders in arithmetic optimization.

Junhyung Um, Taewhan Kim, C. L. Liu

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999