Katarzyna Radecka

Proceedings of the 4th International Conference on Wireless Mobile Communication and Healthcare: "Transforming healthcare through innovations in mobile and wireless technologies", 2014

Development of a Remote Monitoring System for Respiratory Analysis.

[BibT_eX]

[DOI]

Proceedings of the Internet of Things. User-Centric IoT, 2014

Affordable erehabilitation monitoring platform.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Canada International Humanitarian Technology Conference, 2014

Multi-sensor blind recalibration in mHealth applications.

[BibT_eX]

[DOI]

Proceedings of the 2014 IEEE Canada International Humanitarian Technology Conference, 2014

Design of an e-Health Respiration and Body Posture Monitoring System and Its Application for Rib Cage and Abdomen Synchrony Analysis.

[BibT_eX]

[DOI]

Atena Roshan Fekr

Proceedings of the 2014 IEEE International Conference on Bioinformatics and Bioengineering, 2014

2013

On the Fixed-Point Accuracy Analysis and Optimization of Polynomial Specifications.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Testing reversible adder/subtractor for missing control points.

[BibT_eX]

[DOI]

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

SAT-based reversible gate/wire replacement fault testing.

[BibT_eX]

[DOI]

Atena Roshan Fekr

Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A minimum MSE sensor fusion algorithm with tolerance to multiple faults.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE European Test Symposium, 2013

An efficient fault-tolerant sensor fusion algorithm for accelerometers.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Conference on Body Sensor Networks, 2013

SAR Computation and Channel Modeling of Body Area Network.

[BibT_eX]

[DOI]

Proceedings of the 8th International Conference on Body Area Networks, 2013

2012

Analytical Optimization of Bit-Widths in Fixed-Point LTI Systems.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Issues in Multi-valued Multi-modal Sensor Fusion.

[BibT_eX]

[DOI]

Majid Janidarmian

Proceedings of the 42nd IEEE International Symposium on Multiple-Valued Logic, 2012

Verification of fixed-point datapaths with comparator units using Constrained Arithmetic Transform (CAT).

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012

MSE minimization and fault-tolerant data fusion for multi-sensor systems.

[BibT_eX]

[DOI]

Proceedings of the 30th International IEEE Conference on Computer Design, 2012

Fixed-point accuracy analysis of datapaths with mixed CORDIC and polynomial computations.

[BibT_eX]

[DOI]

Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

2011

Fault tolerant glucose sensor readout and recalibration.

[BibT_eX]

[DOI]

Proceedings of Wireless Health 2011, 2011

Rev-Map: A Direct Gateway from Classical Irreversible Network to Reversible Network.

[BibT_eX]

[DOI]

Proceedings of the 41st IEEE International Symposium on Multiple-Valued Logic, 2011

Analysis of Mean-Square-Error (MSE) for fixed-point FFT units.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

An efficient algorithm of performing range analysis for fixed-point arithmetic circuits based on SAT checking.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

A novel method of synthesizing reversible logic.

[BibT_eX]

[DOI]

Proceedings of the International Symposium on Circuits and Systems (ISCAS 2011), 2011

Reversible implementation of square-root circuit.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE International Conference on Electronics, Circuits and Systems, 2011

A study on relating redundancy removal in classical circuits to reversible mapping.

[BibT_eX]

[DOI]

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

Positive Davio-based synthesis algorithm for reversible logic.

[BibT_eX]

[DOI]

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

An efficient hybrid engine to perform range analysis and allocate integer bit-widths for arithmetic circuits.

[BibT_eX]

[DOI]

Proceedings of the 16th Asia South Pacific Design Automation Conference, 2011

On the Fixed-Point Accuracy Analysis and Optimization of FFT Units with CORDIC Multipliers.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Symposium on Computer Arithmetic, 2011

2010

Optimization of Imprecise Circuits Represented by Taylor Series and Real-Valued Polynomials.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

An efficient method to perform range analysis for DSP circuits.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE International Conference on Electronics, 2010

Analysis of precision for scaling the intermediate variables in fixed-point arithmetic circuits.

[BibT_eX]

[DOI]

Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

Analysis of range and precision for fixed-point linear arithmetic circuits with feedbacks.

[BibT_eX]

[DOI]

Proceedings of the IEEE International High Level Design Validation and Test Workshop, 2010

2008

Design for Testability of QCA Logic Under Stuck-at-value Fault Model.

[BibT_eX]

[DOI]

Shahriar Al-Imam

J. Multiple Valued Log. Soft Comput., 2008

Optimizing imprecise fixed-point arithmetic circuits specified by Taylor Series through arithmetic transform.

[BibT_eX]

[DOI]

Proceedings of the 45th Design Automation Conference, 2008

2007

Scaling and Better Approximating Quantum Fourier Transform by Higher Radices.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2007

Adiabatic Implementation of Reversible Logic Circuits in CMOS Technology.

[BibT_eX]

[DOI]

Ali Khazamipour

J. Multiple Valued Log. Soft Comput., 2007

Reversible circuit technology mapping from non-reversible specifications.

[BibT_eX]

[DOI]

Ali Kazamiphur

Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006

Energy Efficient Software-Based Self-Test for Wireless Sensor Network Nodes.

[BibT_eX]

[DOI]

Rong Zhang

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

Testing QCA Modular Logic.

[BibT_eX]

[DOI]

Shahriar Al-Imam

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Arithmetic Transforms of Imprecise Datapaths by Taylor Series Conversion.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

Algorithms for Compositions of Arithmetic Transforms and Their Extensions.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE International Conference on Electronics, 2006

2004

Design Verification by Test Vectors and Arithmetic Transform Universal Test Set.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2004

Architectures of Increased Availability Wireless Sensor Network Nodes.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

FPGA Emulation of Quantum Circuits.

[BibT_eX]

[DOI]

Ahmed Usman Khalid

Proceedings of the 22nd IEEE International Conference on Computer Design: VLSI in Computers & Processors (ICCD 2004), 2004

2002

Identifying Redundant Wire Replacements for Synthesis and Verification.

[BibT_eX]

[DOI]

Proceedings of the 7th Asia and South Pacific Design Automation Conference (ASP-DAC 2002), 2002

The Role of Super-Fast Transforms in Speeding Up Quantum Computations.

[BibT_eX]

[DOI]

Proceedings of the 32nd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2002), 2002

Specifying and verifying imprecise sequential datapaths by Arithmetic Transforms.

[BibT_eX]

[DOI]

Proceedings of the 2002 IEEE/ACM International Conference on Computer-aided Design, 2002

2001

: Identifying redundant gate replacements in verification by error modeling.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Combinational verification by simulations, SAT and BDDs.

[BibT_eX]

[DOI]

Karim Khordoc

Proceedings of the 2001 8th IEEE International Conference on Electronics, 2001

Arithmetic Transforms for Verifying Compositions of Sequential Datapaths.

[BibT_eX]

[DOI]

Proceedings of the 19th International Conference on Computer Design (ICCD 2001), 2001

2000

Using Arithmetic Transform for Verification of Datapath Circuits via Error Modeling.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

1999

On Feasible Multivariate Polynomial Interpolations over Arbitrary Fields.

[BibT_eX]

[DOI]

Proceedings of the 1999 International Symposium on Symbolic and Algebraic Computation, 1999

1997

Arithmetic built-in self-test for DSP cores.

[BibT_eX]

[DOI]