Jerzy Tyszer

Justyna Zawada

Proceedings of the IEEE International Test Conference, 2018

Deterministic Stellar BIST for In-System Automotive Test.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2018

Hypercompression of Test Patterns.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2018

2017

Trimodal Scan-Based Test Paradigm.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2017

Embedded Deterministic Test Points.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2017

Star-EDT: Deterministic On-Chip Scheme Using Compressed Test Patterns.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017

Full-scan LBIST with capture-per-cycle hybrid test points.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Test Conference, 2017

ROM fault diagnosis for O(n<sup>2</sup>) test algorithms.

[BibT_eX]

[DOI]

Artur Pogiel

Proceedings of the 22nd IEEE European Test Symposium, 2017

2016

On New Test Points for Compact Cell-Aware Tests.

[BibT_eX]

[DOI]

IEEE Des. Test, 2016

Test point insertion in hybrid test compression/LBIST architectures.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Test Conference, 2016

Minimal area test points for deterministic patterns.

[BibT_eX]

[DOI]

Proceedings of the 2016 IEEE International Test Conference, 2016

On Test Points Enhancing Hardware Security.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2015

Low-Power Programmable PRPG With Test Compression Capabilities.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Scan Test Bandwidth Management for Ultralarge-Scale System-on-Chip Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Very Large Scale Integr. Syst., 2015

Isometric Test Data Compression.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015

A deterministic BIST scheme based on EDT-compressed test patterns.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Test Conference, 2015

Embedded deterministic test points for compact cell-aware tests.

[BibT_eX]

[DOI]

Proceedings of the 2015 IEEE International Test Conference, 2015

Design for low test pattern counts.

[BibT_eX]

[DOI]

Proceedings of the 52nd Annual Design Automation Conference, 2015

TestExpress - New Time-Effective Scan-Based Deterministic Test Paradigm.

[BibT_eX]

[DOI]

Proceedings of the 24th IEEE Asian Test Symposium, 2015

2014

Erratum to "Test Time Reduction in EDT Bandwidth Management for SoC Designs".

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Isometric test compression with low toggling activity.

[BibT_eX]

[DOI]

Proceedings of the 2014 International Test Conference, 2014

Quality assurance in memory built-in self-test tools.

[BibT_eX]

[DOI]

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

On Using Implied Values in EDT-based Test Compression.

[BibT_eX]

[DOI]

Proceedings of the 51st Annual Design Automation Conference 2014, 2014

High-Speed Serial Embedded Deterministic Test for System-on-Chip Designs.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

Low Power Test Compression with Programmable Broadcast-Based Control.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013

Test Time Reduction in EDT Bandwidth Management for SoC Designs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

On Deploying Scan Chains for Data Storage in Test Compression Environment.

[BibT_eX]

[DOI]

IEEE Des. Test, 2013

Fault diagnosis of TSV-based interconnects in 3-D stacked designs.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Test Conference, 2013

EDT bandwidth management - Practical scenarios for large SoC designs.

[BibT_eX]

[DOI]

Proceedings of the 2013 IEEE International Test Conference, 2013

New test compression scheme based on low power BIST.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE European Test Symposium, 2013

2012

EDT Bandwidth Management in SoC Designs.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012

Test generator with preselected toggling for low power built-in self-test.

[BibT_eX]

[DOI]

Proceedings of the 30th IEEE VLSI Test Symposium, 2012

Low power programmable PRPG with enhanced fault coverage gradient.

[BibT_eX]

[DOI]

Proceedings of the 2012 IEEE International Test Conference, 2012

Low power test application with selective compaction in VLSI designs.

[BibT_eX]

[DOI]

Dariusz Czysz

Proceedings of the 2012 IEEE International Test Conference, 2012

Bandwidth-aware test compression logic for SoC designs.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE European Test Symposium, 2012

2011

BIST-Based Fault Diagnosis for Read-Only Memories.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Deterministic Clustering of Incompatible Test Cubes for Higher Power-Aware EDT Compression.

[BibT_eX]

[DOI]

Przemyslaw Szczerbicki

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Fault Diagnosis with Orthogonal Compactors in Scan-Based Designs.

[BibT_eX]

[DOI]

J. Electron. Test., 2011

Ring Generator: An Ultimate Linear Feedback Shift Register.

[BibT_eX]

[DOI]

Computer, 2011

EDT channel bandwidth management in SoC designs with pattern-independent test access mechanism.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2011

Reduced ATE Interface for High Test Data Compression.

[BibT_eX]

[DOI]

Proceedings of the 16th European Test Symposium, 2011

Fault Diagnosis in Memory BIST Environment with Non-march Tests.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

Power Aware Embedded Test.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

Low Power Decompressor and PRPG with Constant Value Broadcast.

[BibT_eX]

[DOI]

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

High Volume Diagnosis in Memory BIST Based on Compressed Failure Data.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

On Compaction Utilizing Inter and Intra-Correlation of Unknown States.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010

Dynamic channel allocation for higher EDT compression in SoC designs.

[BibT_eX]

[DOI]

Proceedings of the 2011 IEEE International Test Conference, 2010

Low power compression of incompatible test cubes.

[BibT_eX]

[DOI]

Przemyslaw Szczerbicki

Proceedings of the 2011 IEEE International Test Conference, 2010

Diagnosis of failing scan cells through orthogonal response compaction.

[BibT_eX]

[DOI]

Proceedings of the 15th European Test Symposium, 2010

2009

Low-Power Scan Operation in Test Compression Environment.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Highly X-Tolerant Selective Compaction of Test Responses.

[BibT_eX]

[DOI]

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Defect Aware to Power Conscious Tests - The New DFT Landscape.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

High-Speed On-Chip Event Counters for Embedded Systems.

[BibT_eX]

[DOI]

Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009

Fault diagnosis for embedded read-only memories.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Test Conference, 2009

Compression based on deterministic vector clustering of incompatible test cubes.

[BibT_eX]

[DOI]

Proceedings of the 2009 IEEE International Test Conference, 2009

2008

X-Press: Two-Stage X-Tolerant Compactor With Programmable Selector.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

Low-Power Test Data Application in EDT Environment Through Decompressor Freeze.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008

High Throughput Diagnosis via Compression of Failure Data in Embedded Memory BIST.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Test Conference, 2008

Low Power Scan Shift and Capture in the EDT Environment.

[BibT_eX]

[DOI]

Proceedings of the 2008 IEEE International Test Conference, 2008

2007

Fault Diagnosis With Convolutional Compactors.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Isolation of Failing Scan Cells through Convolutional Test Response Compaction.

[BibT_eX]

[DOI]

J. Electron. Test., 2007

X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2007

Low Power Embedded Deterministic Test.

[BibT_eX]

[DOI]

Proceedings of the 25th IEEE VLSI Test Symposium (VTS 2007), 2007

New Test Data Decompressor for Low Power Applications.

[BibT_eX]

[DOI]

Proceedings of the 44th Design Automation Conference, 2007

2006

High Performance Dense Ring Generators.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2006

X-Press Compactor for 1000x Reduction of Test Data.

[BibT_eX]

[DOI]

Proceedings of the 2006 IEEE International Test Conference, 2006

Convolutional Compactors with Variable Polynomials.

[BibT_eX]

[DOI]

Artur Pogiel

Proceedings of the 11th European Test Symposium, 2006

Test response compactor with programmable selector.

[BibT_eX]

[DOI]

Proceedings of the 43rd Design Automation Conference, 2006

2005

Finite memory test response compactors for embedded test applications.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005

Synthesis of X-Tolerant Convolutional Compactors.

[BibT_eX]

[DOI]

Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

On Efficient X-Handling Using a Selective Compaction Scheme to Achieve High Test Response Compaction Ratios.

[BibT_eX]

[DOI]

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005

Diagnosis with convolutional compactors in presence of unknown states.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

Convolutional compaction-driven diagnosis of scan failures.

[BibT_eX]

[DOI]

Proceedings of the 10th European Test Symposium, 2005

2004

Embedded deterministic test.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Ring generators - new devices for embedded test applications.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004

Planar High Performance Ring Generators.

[BibT_eX]

[DOI]

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Embedded Test for Low Cost Manufacturing.

[BibT_eX]

[DOI]

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Fault Diagnosis in Designs with Convolutional Compactors.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

2003

Primitive Polynomials Over GF(2) of Degree up to 660 with Uniformly Distributed Coefficients.

[BibT_eX]

[DOI]

J. Electron. Test., 2003

Embedded Deterministic Test for Low-Cost Manufacturing.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2003

2D Test Sequence Generators.

[BibT_eX]

[DOI]

IEEE Des. Test Comput., 2003

High Speed Ring Generators and Compactors of Test Data.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Convolutional Compaction of Test Responses.

[BibT_eX]

[DOI]

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

Test Data Compression and Compaction for Embedded Test of Nanometer Technology Designs.

[BibT_eX]

[DOI]

Proceedings of the 21st International Conference on Computer Design (ICCD 2003), 2003

On Compacting Test Response Data Containing Unknown Values.

[BibT_eX]

[DOI]

Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

2002

Embedded Deterministic Test for Low-Cost Manufacturing Test.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

2001

Testing Schemes for FIR Filter Structures.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2001

2000

Automated synthesis of phase shifters for built-in self-testapplications.

[BibT_eX]

[DOI]

Nagesh Tamarapalli

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Cellular automata-based test pattern generators with phase shifters.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000

Linear Independence as Evaluation Criterion for Two-Dimensional Test Pattern Generators.

[BibT_eX]

[DOI]

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

1999

Diagnosis of Scan Cells in BIST Environment.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1999

Testing of telecommunications hardware [Guest Editorial].

[BibT_eX]

[DOI]

IEEE Commun. Mag., 1999

Comparative Study of CA-based PRPGs and LFSRs with Phase Shifters.

[BibT_eX]

[DOI]

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

Built-In Self-Test for Systems on Silicon.

[BibT_eX]

[DOI]

Sanjay Patel

Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

Synthesis of pattern generators based on cellular automata with phase shifters.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998

Test Data Decompression for Multiple Scan Designs with Boundary Scan.

[BibT_eX]

[DOI]

Nadime Zacharia

IEEE Trans. Computers, 1998

Design of Phase Shifters for BIST Applications.

[BibT_eX]

[DOI]

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

Automated synthesis of large phase shifters for built-in self-test.

[BibT_eX]

[DOI]

Nagesh Tamarapalli

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Modular logic built-in self-test for IP cores.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

1997

Arithmetic built-in self-test for DSP cores.

[BibT_eX]

[DOI]

Katarzyna Radecka

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997

Design of Testable Multipliers for Fixed-Width Data Paths.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1997

Fault Diagnosis in Scan-Based BIST.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Parameterizable Testing Scheme for FIR Filters.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

1996

On Linear Dependencies in Subspaces of LFSR-Generated Sequences.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1996

Arithmetic Additive Generators of Pseudo-Exhaustive Test Patterns.

[BibT_eX]

[DOI]

Sanjay Gupta

IEEE Trans. Computers, 1996

Broadband Time-Division Circuit Switching.

[BibT_eX]

[DOI]

Andrzej Jajszczyk

IEEE J. Sel. Areas Commun., 1996

Two-Dimensional Test Data Decompressor for Multiple Scan Designs.

[BibT_eX]

[DOI]

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Multiplicative Window Generators of Pseudo-random Test Vectors.

[BibT_eX]

[DOI]

Proceedings of the 1996 European Design and Test Conference, 1996

1995

Decompression of test data using variable-length seed LFSRs.

[BibT_eX]

[DOI]

Nadime Zacharia

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Arithmetic built-in self test for high-level synthesis.

[BibT_eX]

[DOI]

Proceedings of the 13th IEEE VLSI Test Symposium (VTS'95), April 30, 1995

Hierarchical Functional-Fault Simulation for High-Level Synthesis.

[BibT_eX]

[DOI]

Mark Kassab

Proceedings of the Proceedings IEEE International Test Conference 1995, 1995

On testable multipliers for fixed-width data path architectures.

[BibT_eX]

[DOI]

Proceedings of the 1995 IEEE/ACM International Conference on Computer-Aided Design, 1995

Software Accelerated Functional Fault Simulation for Data-Path Architectures.

[BibT_eX]

[DOI]

Proceedings of the 32st Conference on Design Automation, 1995

1994

Test pattern generation based on arithmetic operations.

[BibT_eX]

[DOI]

Sanjay Gupta

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

1993

Test responses compaction in accumulators with rotate carry adders.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993

Recursive Pseudoexhaustive Test Pattern Generation.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1993

Accumulator-Based Compaction of Test Responses.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1993

1992

Testing of three-stage switching networks for coupling faults.

[BibT_eX]

[DOI]

IEEE Trans. Commun., 1992

1991

Test generation for pattern-sensitive faults in integrated switches.

[BibT_eX]

[DOI]

IEEE Trans. Commun., 1991

On the diagnostic properties of linear feedback shift registers.

[BibT_eX]

[DOI]

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991

1990

Interference faults testing for time switches.

[BibT_eX]

[DOI]

IEEE Trans. Commun., 1990

On the Diagnostic Resolution of Signature Analysis.

[BibT_eX]

[DOI]

Babak Salimi

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 1990

1989

Fault diagnosis of digital switching networks.

[BibT_eX]

[DOI]

Andrzej Jajszczyk

IEEE Trans. Commun., 1989

1988

A Multiple Fault-Tolerant Processor Network Architecture for Pipeline Computing.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1988

Multiple fault diagnosis for interconnection networks for distributed systems.

[BibT_eX]

[DOI]

Microprocess. Microprogramming, 1988

1986

The Influence of Masking Phenomenon on Coverage Capability of Single Fault Test Sets in PLA's.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1986

1985

Combinatorial Approach to Multiple Contact Faults Coverage in Programmable Logic Arrays.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 1985

1984

The detection of small size multiple faults by single fault test sets n programmable logic arrays.

[BibT_eX]

[DOI]