Kazuhiro Nakamura

According to our database1, Kazuhiro Nakamura authored at least 24 papers between 1997 and 2023.

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Bibliography

2023
Embedding a Differentiable Mel-Cepstral Synthesis Filter to a Neural Speech Synthesis System.
Proceedings of the IEEE International Conference on Acoustics, 2023

2020
Fast and High-Quality Singing Voice Synthesis System Based on Convolutional Neural Networks.
Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

2019
Singing voice synthesis based on convolutional neural networks.
CoRR, 2019

2018
Recent Development of the DNN-based Singing Voice Synthesis System - Sinsy.
Proceedings of the Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, 2018

2016
Random testing of C compilers based on test program generation by equivalence transformation.
Proceedings of the 2016 IEEE Asia Pacific Conference on Circuits and Systems, 2016

2014
Integration of Spectral Feature Extraction and Modeling for HMM-Based Speech Synthesis.
IEICE Trans. Inf. Syst., 2014

A mel-cepstral analysis technique restoring high frequency components from low-sampling-rate speech.
Proceedings of the INTERSPEECH 2014, 2014

Integration of speaker and pitch adaptive training for HMM-based singing voice synthesis.
Proceedings of the IEEE International Conference on Acoustics, 2014

HMM-Based singing voice synthesis and its application to Japanese and English.
Proceedings of the IEEE International Conference on Acoustics, 2014

2013
Integration of acoustic modeling and mel-cepstral analysis for HMM-based speech synthesis.
Proceedings of the IEEE International Conference on Acoustics, 2013

Hyperpolarized <sup>129</sup>Xe spectra from C6 glioma cells implanted in rat brains.
Proceedings of the 35th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2013

2012
A VLSI Architecture with Multiple Fast Store-Based Block Parallel Processing for Output Probability and Likelihood Score Computations in HMM-Based Isolated Word Recognition.
IEICE Trans. Electron., 2012

2010
A VLSI Architecture for Output Probability Computations of HMM-Based Recognition Systems with Store-Based Block Parallel Processing.
IEICE Trans. Inf. Syst., 2010

2008
Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008

Acoustic modeling with contextual additive structure for HMM-based speech recognition.
Proceedings of the IEEE International Conference on Acoustics, 2008

2007
Scale-Free Property of Directed Networks with Two Intrinsic Node Weights.
Proceedings of the Global Communications Conference, 2007

2004
Development and evaluation of symbolic model checker based on approximation for real-time systems.
Syst. Comput. Jpn., 2004

2001
Speech recognition chip for monosyllables.
Proceedings of ASP-DAC 2001, 2001

A real-time 64-monosyllable recognition LSI with learning mechanism.
Proceedings of ASP-DAC 2001, 2001

2000
Multi-clock path analysis using propositional satisfiability.
Proceedings of ASP-DAC 2000, 2000

1998
Waiting false path analysis of sequential logic circuits for performance optimization.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

Formal Verification of Real-Time Software by Symbolic Model-Checker.
Proceedings of the 1st International Conference on Application of Concurrency to System Design (ACSD '98), 1998

1997
A walking navigation system for the blind.
Syst. Comput. Jpn., 1997

Symbolic Model-Checking Method Based on Approximations and Binary Decision Diagrams for Real-Time Systems.
Proceedings of the Theoretical Aspects of Computer Software, Third International Symposium, 1997


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