Kazuyuki Maruo

According to our database, Kazuyuki Maruo authored at least 4 papers between 2003 and 2008.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2008

Enhancing Transition Fault Model for Delay Defect Diagnosis.

Wu-Tung Cheng, Brady Benware, Ruifeng Guo, Kun-Han Tsai, Takeo Kobayashi, Kazuyuki Maruo, Michinobu Nakao, Yoshiaki Fukui, Hideyuki Otake

Proceedings of the 17th IEEE Asian Test Symposium, 2008

2004

A Dynamically-Reconfigurable Image Recognition Processor.

Kazuyuki Maruo, Masayoshi Ichikawa, Naoto Miyamoto, Leo Karnan, Takahiro J. Yamaguchi, Koji Kotani, Tadahiro Ohmi

Proceedings of the 18th International Parallel and Distributed Processing Symposium (IPDPS 2004), 2004

An image recognition processor using dynamically reconfigurable ALU.

Naoto Miyamoto, Koji Kotani, Kazuyuki Maruo, Tadahiro Ohmi

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, 2004

2003

A small-area high performance 512-point 2-dimensional FFT single-chip processor.

Naoto Miyamoto, Leo Karnan, Kazuyuki Maruo, Koji Kotani, Tadahiro Ohmi

Proceedings of the ESSCIRC 2003, 2003