Ken'ichi Asano

According to our database, Ken'ichi Asano authored at least 3 papers between 1991 and 2000.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2000

Media processor core architecture for realtime, bi-directional MPEG4/H.26X codec with 30 fr/s for CIF-video.

T. Kamemaru, Hideo Ohira, H. Suzuki, Ken'ichi Asano, Masahiko Yoshimoto, Tokumichi Murakami

Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000

1999

A single-chip MPEG2 422@ML video, audio, and system encoder with a 162-MHz media-processor and dual motion estimation cores.

Satoshi Kumaki, Tetsuya Matsumura, Kamya Ishihara, Hiroshi Segawa, Kiyofumi Kawamoto, Hideo Ohira, Toshiaki Shimada, Hidenori Sato, Takashi Hattori, Tetsuro Wada, Hiroshi Honma, Tetsuya Watanabe, Hisakazu Sato, Ken'ichi Asano, Toyohiko Yoshida

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1991

32 x 32 Shared Buffer Type ATM Switch VLSI's for B-ISDN's.

Takahiko Kozaki, Noboru Endo, Yoshito Sakurai, Osamu Matsubara, Masao Mizukami, Ken'ichi Asano

IEEE J. Sel. Areas Commun., 1991