Hisakazu Sato

According to our database, Hisakazu Sato authored at least 5 papers between 1991 and 1999.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

1999

The D30V/MPEG multimedia processor.

Hidehiro Takata, Tetsuya Watanabe, Tetsuo Nakajima, Takashi Takagaki, Hisakazu Sato, Atsushi Mohri, Akira Yamada, Toshiki Kanamoto, Yoshio Matsuda, Shuhei Iwade, Yasutaka Horiba

IEEE Micro, 1999

A real-time digital VCR encode/decode and MPEG-2 decode LSI implemented on a dual-issue RISC processor.

Atsushi Mohri, Akira Yamada, Y. Yoshida, Hisakazu Sato, Hidehiro Takata, K. Nakakimura, M. Hashizume, Y. Shimotsuma, K. Tsuchihashi

IEEE J. Solid State Circuits, 1999

A single-chip MPEG2 422@ML video, audio, and system encoder with a 162-MHz media-processor and dual motion estimation cores.

Satoshi Kumaki, Tetsuya Matsumura, Kamya Ishihara, Hiroshi Segawa, Kiyofumi Kawamoto, Hideo Ohira, Toshiaki Shimada, Hidenori Sato, Takashi Hattori, Tetsuro Wada, Hiroshi Honma, Tetsuya Watanabe, Hisakazu Sato, Ken'ichi Asano, Toyohiko Yoshida

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1997

A dual-issue RISC processor for multimedia signal processing.

Hisakazu Sato, Edgar Holmann, Toyohiko Yoshida, Masahito Matsuo, Toru Kengaku

Proceedings of the 1997 IEEE International Conference on Acoustics, 1997

1991

A Data-Driven Architecture for Distributed Parallel Processing.

Toshiyuki Tamura, Shinji Komori, Fumiyasu Asai, Hirono Tsubota, Hisakazu Sato, Hidehiro Takata, Yoshihiro Seguchi, Takeshi Tokuda, Hiroaki Terada

Proceedings of the Proceedings 1991 IEEE International Conference on Computer Design: VLSI in Computer & Processors, 1991