Hidenori Sato

According to our database, Hidenori Sato authored at least 16 papers between 1996 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

A multi-standards HDTV video decoder for blu-ray disc standard.

Noriyuki Minegishi, Hidenori Sato, Fumitaka Izuhara, Masayuki Koyama, Anthony Vetro

IEEE Trans. Consumer Electron., 2009

2007

Realizing Energy-Efficient MultiCore Processors by Utilizing Speculative Thread-Level Parallelism.

Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu

Int. J. Comput. Their Appl., 2007

2006

Improving Energy Efficiency Via Speculative Multithreading on MultiCore Processors.

Toshinori Sato, Yuu Tanaka, Hidenori Sato, Toshimasa Funaki, Takenori Koushiro, Akihiro Chiyonobu

Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, 2006

2004

Arm-Pointer: 3D Pointing Interface for Real-World Interaction.

Eiichi Hosoya, Hidenori Sato, Miki Kitabata, Ikuo Harada, Hisao Nojima, Akira Onozawa

Proceedings of the Computer Vision in Human-Computer Interaction, 2004

A static and dynamic energy reduction technique for I-cache and BTB in embedded processors.

Hidenori Sato, Toshinori Sato

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

A Mirror Metaphor Interaction System: Touching Remote Real Objects in an Augmented Reality Environment.

Eiichi Hosoya, Miki Kitabata, Hidenori Sato, Ikuo Harada, Hisao Nojima, Fumiharu Morisawa, Shinichiro Mutoh, Akira Onozawa

Proceedings of the 2003 IEEE / ACM International Symposium on Mixed and Augmented Reality (ISMAR 2003), 2003

2002

A 99-mm² 0.7-W single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mb embedded DRAM for portable 422P@HL encoder system.

Satoshi Kumaki, Hidehiro Takata, Yoshihide Ajioka, Tsukasa Ooishi, Kazuya Ishihara, Atsuo Hanami, Takaharu Tsuji, Tetsuya Watanabe, Chikayoshi Morishima, Tomoaki Yoshizawa, Hidenori Sato, Shin-ichi Hattori, Atsushi Koshio, Kazuhiro Tsukamoto, Tetsuya Matsumura

IEEE J. Solid State Circuits, 2002

Necessary and Sufficient Conditions for One-Dimensional Discrete-Time Binary Cellular Neural Networks with Unspecified Fixed Boundaries to Be Stable.

Hidenori Sato, Tetsuo Nishi, Norikazu Takahashi

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Regeneration of real objects in the real world.

Hiroto Matsuoka, Akira Onozawa, Hidenori Sato, Hisao Nojima

Proceedings of the 29th International Conference on Computer Graphics and Interactive Techniques, 2002

Necessary and sufficient conditions for one-dimensional discrete-time binary cellular neural networks with both A- and B-templates to be stable.

Tetsuo Nishi, Hidenori Sato, Norikazu Takahashi

Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Hexagonal Image Representation for 3-D Photorealistic Reconstruction.

Hidenori Sato, Hiroto Matsuoka, Akira Onozawa, Hitoshi Kitazawa

Proceedings of the 16th International Conference on Pattern Recognition, 2002

2001

A 99-mm², 0.7-W, single-chip MPEG-2 422P@ML video, audio, and system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system.

Satoshi Kumaki, Hidehiro Takata, Yoshihide Ajioka, Tsukasa Ooishi, Kazuya Ishihara, Atsuo Hanami, Takaharu Tsuji, Yusuke Kanehira, Tetsuya Watanabe, Chikayoshi Morishima, Tomoaki Yoshizawa, Hidenori Sato, Shin-ichi Hattori, Atsushi Koshio, Kazuhiro Tsukamoto, Tetsuva Matsumura

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

2000

Optimizing Network 3D Data Transmissions for Interactive Applications.

Ikuo Harada, Hidenori Sato, Hitoshi Kitazawa

Proceedings of the 8th Pacific Conference on Computer Graphics and Applications, 2000

MPEG-2 4: 2: 2@HL encoder chip set.

Hidenori Sato, Hideo Ohira, Masahiko Kazayama, Ayako Harada, Masahiko Yoshimoto, Okikazu Tanno, Satoshi Kumaki, Kazuya Ishibara, Atsuo Hanami, Tetsuya Mutsumura

Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999

A single-chip MPEG2 422@ML video, audio, and system encoder with a 162-MHz media-processor and dual motion estimation cores.

Satoshi Kumaki, Tetsuya Matsumura, Kamya Ishihara, Hiroshi Segawa, Kiyofumi Kawamoto, Hideo Ohira, Toshiaki Shimada, Hidenori Sato, Takashi Hattori, Tetsuro Wada, Hiroshi Honma, Tetsuya Watanabe, Hisakazu Sato, Ken'ichi Asano, Toyohiko Yoshida

Proceedings of the IEEE 1999 Custom Integrated Circuits Conference, 1999

1996

A Balanced-Mesh Clock Routing Technique Using Circuit Partitioning.

Hidenori Sato, Akira Onozawa, Hiroaki Matsuda

Proceedings of the 1996 European Design and Test Conference, 1996