Ken Namura

According to our database, Ken Namura authored at least 4 papers between 2006 and 2025.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2025

Trailing-Ones Anticipation for Reducing the Latency of the Rounding Incrementer in FP FMA Units.

Toru Koizumi, Ryota Shioya, Takuya Yamauchi, Tomoya Adachi, Ken Namura, Jun Makino

Proceedings of the IEEE 32nd Symposium on Computer Arithmetic, 2025

2021

MN-Core - A Highly Efficient and Scalable Approach to Deep Learning.

Ken Namura, Johannes Maximilian Kühn, Tohru Adachi, H. Imachi, H. Kaneko, T. Kato, Go Watanabe, Naoto Tanaka, S. Kashihara, Hiroshi Miyashita, Y. Tomonaga, Ryosuke Okuta, Takuya Akiba, Brian Vogel, S. Kitajo, F. Osawa, K. Takahashi, Y. Takatsukasa, K. Mizumaru, Takuya Yamauchi, J. Ono, A. Takahashi, Tanvir Ahmed, Y. Doi, K. Hiraki, Jun Makino

Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

A Highly Efficient Layout-Aware FPGA Overlay Accelerator Mapping Method.

Tanvir Ahmed, Johannes Maximilian Kühn, Ken Namura

Proceedings of the 14th IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2021

2006

Early Life Cycle Yield Learning for Nanometer Devices Using Volume Yield Diagnostics Analysis.

Sanae Seike, Ken Namura, Yukio Ohya, Anis Uzzaman, Shinichi Arima, Dale Meehl, Vivek Chickermane, Azumi Kobayashi, Satoshi Tanaka, Hiroyuki Adachi

Proceedings of the 15th Asian Test Symposium, 2006