Anis Uzzaman

According to our database1, Anis Uzzaman authored at least 16 papers between 2005 and 2010.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2010
Reduction of Test Data Volume and Improvement of Diagnosability Using Hybrid Compression.
IEICE Trans. Inf. Syst., 2010

2009
Automatic Handling of Programmable On-Product Clock Generation (OPCG) Circuitry for Low Power Aware Delay Test.
J. Low Power Electron., 2009

Is Low Power Testing Necessary? What does the Test Industry Truly Need?.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

A Partially-Exhaustive Gate Transition Fault Model.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

Why is Conventional ATPG Not Sufficient for Advanced Low Power Designs?.
Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008
How To Increase the Effectiveness of Yield Diagnostics-Is DFM the Answer to This?
Proceedings of the 17th IEEE Asian Test Symposium, 2008

Optimizing Test Data Volume Using Hybrid Compression.
Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007
Automated handling of programmable on-product clock generation (OPCG) circuitry for delay test vector generation.
Proceedings of the 2007 IEEE International Test Conference, 2007

Test Roles in Diagnosis and Silicon Debug.
Proceedings of the 16th Asian Test Symposium, 2007

Using Programmable On-Product Clock Generation (OPCG) for Delay Test.
Proceedings of the 16th Asian Test Symposium, 2007

A Review of Power Strategies for DFT and ATPG.
Proceedings of the 16th Asian Test Symposium, 2007

2006
Not all Delay Tests Are the Same - SDQL Model Shows True-Time.
Proceedings of the 15th Asian Test Symposium, 2006

A Scalable Architecture for On-Chip Compression: Options and Trade-Offs.
Proceedings of the 15th Asian Test Symposium, 2006

Early Life Cycle Yield Learning for Nanometer Devices Using Volume Yield Diagnostics Analysis.
Proceedings of the 15th Asian Test Symposium, 2006

2005
Low Cost Delay Testing of Nanometer SoCs Using On-Chip Clocking and Test Compression.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

Practical Aspects of Delay Testing for Nanometer Chips.
Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005


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