Khondker Zakir Ahmed

Orcid: 0000-0001-7247-4254

According to our database1, Khondker Zakir Ahmed authored at least 20 papers between 2010 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2024
28.4 A Monolithic 12.7W/mm<sup>2</sup> Pmax, 92% Peak-Efficiency CSCR-First Switched-Capacitor DC-DC Converter.
Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2021
A Universal Modular Hybrid LDO With Fast Load Transient Response and Programmable PSRR in 14-nm CMOS Featuring Dynamic Clamp Strength Tuning.
IEEE J. Solid State Circuits, 2021

A Dual-Input, Digital Hybrid Buck-LDO System Featuring Fast Load Transient Response, Zero-Wire Current Handover & Input PDN Resonance Reduction.
Proceedings of the 2021 Symposium on VLSI Circuits, Kyoto, Japan, June 13-19, 2021, 2021

Peak-Current-Controlled Ganged Integrated High-Frequency Buck Voltage Regulators in 22nm CMOS for Robust Cross-Tile Current Sharing.
Proceedings of the IEEE International Solid-State Circuits Conference, 2021

2020
A Variation-Adaptive Integrated Computational Digital LDO in 22-nm CMOS With Fast Transient Response.
IEEE J. Solid State Circuits, 2020

A Dual-Rail Hybrid Analog/Digital LDO with Dynamic Current Steering for Tunable High PSRR and High Efficiency.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Digital Control of Switching and Linear Integrated Voltage Regulators.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
A Light-Load Efficient Fully Integrated Voltage Regulator in 14-nm CMOS With 2.5-nH Package-Embedded Air-Core Inductors.
IEEE J. Solid State Circuits, 2019

A Variation-Adaptive Integrated Computational Digital LDO in 22nm CMOS with Fast Transient Response.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

A Modular Hybrid LDO with Fast Load-Transient Response and Programmable PSRR in 14nm CMOS Featuring Dynamic Clamp Tuning and Time-Constant Compensation.
Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2017
A Single-Chip Image Sensor Node With Energy Harvesting From a CMOS Pixel Array.
IEEE Trans. Circuits Syst. I Regul. Pap., 2017

2016
A single-inductor-cascaded-stage topology for high conversion ratio boost regulator.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016

Reconfigurable 96×128 active pixel sensor with 2.1µW/mm<sup>2</sup> power generation and regulated multi-domain power delivery for self-powered imaging.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

(Invited paper) energy delivery for self-powered IoT devices.
Proceedings of the 21st Asia and South Pacific Design Automation Conference, 2016

2014
An on-chip autonomous thermoelectric energy management system for energy-efficient active cooling.
Proceedings of the International Symposium on Low Power Electronics and Design, 2014

2013
A 110nA synchronous boost regulator with autonomous bias gating for energy harvesting.
Proceedings of the IEEE 2013 Custom Integrated Circuits Conference, 2013

2012
Characterization of Inverse Temperature Dependence in logic circuits.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Design and implementation of a 0.8 V input, 84% duty cycle, variable frequency step-up converter.
Microelectron. J., 2011

2010
Implementation of highly accurate NMOS Vt based clamping technique in low current comparator.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010

Design of a linearly increasing inrush current limit circuit for DC-DC boost regulators.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2010


  Loading...