Kiyoshi Kato

According to our database1, Kiyoshi Kato authored at least 25 papers between 1988 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.
Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018
Regularization with numerical extrapolation for finite and UV-divergent multi-loop integrals.
Comput. Phys. Commun., 2018

A 20ns-write 45ns-read and 10<sup>14</sup>-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors.
Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017
Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS.
IEEE J. Solid State Circuits, 2017

2016
Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.
Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015
16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor.
IEEE Micro, 2014

A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor.
Proceedings of the Symposium on VLSI Circuits, 2014

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.
Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2013
Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor.
Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

2012
Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor.
IEEE J. Solid State Circuits, 2012

2000
Deploying the Mobile-Agent Technology in Warehouse Management.
Proceedings of the Intelligent Problem Solving, 2000

1996
Automatic Spinal Deformity Detection by Two Characteristic Axes.
Proceedings of IAPR Workshop on Machine Vision Applications, 1996

A Method of Resolving an Entangled Cord.
Proceedings of IAPR Workshop on Machine Vision Applications, 1996

1995
A Method of Analyzing a Shape with Potential Symmetry and Its Application to Detecting Spinal Deformity.
Proceedings of the Computer Vision, 1995

1994
Vectorization and Representation of Large-Size 2-D Line-Drawing Images.
J. Vis. Commun. Image Represent., 1994

Employing Symmetric Subsets for Identifying Asymmetry of Human Skulls.
Proceedings of IAPR Workshop on Machine Vision Applications, 1994

1993
Symmetry Identification of a 3-D Object Represented by Octree.
IEEE Trans. Pattern Anal. Mach. Intell., 1993

1992
An Interactive 3d Symmetry Analysis System.
Proceedings of IAPR Workshop on Machine Vision Applications, 1992

Three-dimensional symmetry measurement of medical entities.
Proceedings of the 11th IAPR International Conference on Pattern Recognition, 1992

Associating an image by network constraint analysis.
Proceedings of the 11th IAPR International Conference on Pattern Recognition, 1992

1991
A robot manipulator by a distributed control approach.
Adv. Robotics, 1991

1989
Reconstructing an edge on a polyhedron using an optimization method.
Comput. Vis. Graph. Image Process., 1989

1988
Reconstructible Pairs of Incomplete Polyhedral Line Drawings.
Proceedings of the Pattern Recognition, 1988

Reconstructible pairs of incomplete polyhedral line drawings under general reconstruction procedure.
Proceedings of the 9th International Conference on Pattern Recognition, 1988


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