Kiyoshi Kato

According to our database, Kiyoshi Kato authored at least 27 papers between 1988 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.

Takahiko Ishizu, Yuto Yakubo, Kazuma Furutani, Atsuo Isobe, Masashi Fujita, Tomoaki Atsumi, Yoshinori Ando, Tsutomu Murakawa, Kiyoshi Kato, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

2018

Regularization with numerical extrapolation for finite and UV-divergent multi-loop integrals.

Elise de Doncker, Fukuko Yuasa, Kiyoshi Kato, Tadashi Ishikawa, John A. Kapenga, Omofolakunmi Olagbemi

Comput. Phys. Commun., 2018

A 20ns-write 45ns-read and 10¹⁴-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors.

Shuhei Maeda, Satoru Ohshita, Kazuma Furutani, Yuto Yakubo, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2017

Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS.

Tatsuya Onuki, Wataru Uesugi, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki

IEEE J. Solid State Circuits, 2017

2016

Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.

Tatsuya Onuki, Wataru Uesugi, Hikaru Tamura, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, Chen Bin Lin, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015

16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.

Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor.

Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Wataru Uesugi, Atsuo Isobe, Naoaki Tsutsui, Yasutaka Suzuki, Yutaka Okazaki, Yukio Maehashi, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki, Masahiro Fujita, James Myers, Pekka Korpinen

IEEE Micro, 2014

A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor.

Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Atsushi Hirose, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the Symposium on VLSI Circuits, 2014

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2013

Processor with 4.9-μs break-even time in power gating using crystalline In-Ga-Zn-oxide transistor.

Hidetomo Kobayashi, Kiyoshi Kato, Takuro Ohmaru, Seiichi Yoneda, Tatsuji Nishijima, Shuhei Maeda, Kazuaki Ohshima, Hikaru Tamura, Hiroyuki Tomatsu, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Jun Koyama, Shunpei Yamazaki

Proceedings of the 2013 IEEE Symposium on Low-Power and High-Speed Chips, 2013

2012

Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor.

Hiroki Inoue, Takanori Matsuzaki, Shuhei Nagatsuka, Yutaka Okazaki, Toshinari Sasaki, Kousei Noda, Daisuke Matsubayashi, Takahiko Ishizu, Tatsuya Onuki, Atsuo Isobe, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Jun Koyama, Shunpei Yamazaki

IEEE J. Solid State Circuits, 2012

Numerical computation of two-loop box diagrams with masses.

Fukuko Yuasa, Elise de Doncker, Nobuyuki Hamaguchi, Tadashi Ishikawa, Kiyoshi Kato, Yoshimasa Kurihara, Junpei Fujimoto, Yoshimitsu Shimizu

Comput. Phys. Commun., 2012

2006

GR@PPA 2.7 event generator for pp/pp collisions.

Soshi Tsuno, Toshiaki Kaneko, Yoshimasa Kurihara, Shigeru Odaka, Kiyoshi Kato

Comput. Phys. Commun., 2006

2000

Deploying the Mobile-Agent Technology in Warehouse Management.

Mei-Ling L. Liu, Tao Yang, Sema E. Alptekin, Kiyoshi Kato

Proceedings of the Intelligent Problem Solving, 2000

1996

Automatic Spinal Deformity Detection by Two Characteristic Axes.

Hiroshi Ueno, Seiji Ishikawa, Yoshinori Otsuka, Kiyoshi Kato

Proceedings of IAPR Workshop on Machine Vision Applications, 1996

A Method of Resolving an Entangled Cord.

Yuyo Nogami, Seiji Ishikawa, Kiyoshi Kato

Proceedings of IAPR Workshop on Machine Vision Applications, 1996

1995

A Method of Analyzing a Shape with Potential Symmetry and Its Application to Detecting Spinal Deformity.

Seiji Ishikawa, Hiroyuki Kosaka, Kiyoshi Kato, Yoshinori Otsuka

Proceedings of the Computer Vision, 1995

1994

Vectorization and Representation of Large-Size 2-D Line-Drawing Images.

Sergey Ablameyko, Vladimir Bereishik, Nadeshda Paramonova, Angelo Marcelli, Seiji Ishikawa, Kiyoshi Kato

J. Vis. Commun. Image Represent., 1994

Employing Symmetric Subsets for Identifying Asymmetry of Human Skulls.

Teruhito Takeda, Seiji Ishikawa, Kiyoshi Kato

Proceedings of IAPR Workshop on Machine Vision Applications, 1994

1993

Symmetry Identification of a 3-D Object Represented by Octree.

Predrag Minovic, Seiji Ishikawa, Kiyoshi Kato

IEEE Trans. Pattern Anal. Mach. Intell., 1993

1992

An Interactive 3d Symmetry Analysis System.

Seiji Ishikawa, Keiichi Sato, Predrag Minovic, Kiyoshi Kato

Proceedings of IAPR Workshop on Machine Vision Applications, 1992

Three-dimensional symmetry measurement of medical entities.

Predrag Minovic, Seiji Ishikawa, Kiyoshi Kato

Proceedings of the 11th IAPR International Conference on Pattern Recognition, 1992

Associating an image by network constraint analysis.

Seiji Ishikawa, Kiyoshi Kato

Proceedings of the 11th IAPR International Conference on Pattern Recognition, 1992

1991

A robot manipulator by a distributed control approach.

Yukiharu Yamauchi, Seiji Ishikawa, Kiyoshi Kato

Adv. Robotics, 1991

1989

Reconstructing an edge on a polyhedron using an optimization method.

Sei-ichiro Kamata, Seiji Ishikawa, Kiyoshi Kato

Comput. Vis. Graph. Image Process., 1989

1988

Reconstructible Pairs of Incomplete Polyhedral Line Drawings.

Seiji Ishikawa, Kiyoshi Kato

Proceedings of the Pattern Recognition, 1988

Reconstructible pairs of incomplete polyhedral line drawings under general reconstruction procedure.

Seiji Ishikawa, Kiyoshi Kato

Proceedings of the 9th International Conference on Pattern Recognition, 1988