Tatsuya Onuki

According to our database, Tatsuya Onuki authored at least 9 papers between 2012 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

1Mbit 1T1C 3D DRAM with Monolithically Stacked One Planar FET and Two Vertical FET Heterogeneous Oxide Semiconductor layers over Si CMOS.

Yuki Okamoto, Yusuke Komura, T. Mizuguchi, Toshihiko Saito, M. Ito, K. Kimura, Tatsuya Onuki, Yoshinori Ando, H. Sawai, T. Murakawa, Hitoshi Kunitake, Takanori Matsuzaki, H. Kimura, M. Fujita, Makoto Ikeda, Shunpei Yamazaki

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Two-Dimensionally Arranged Display Drivers Achieved by OS/Si Structure.

Yusuke Komura, Shoki Miyata, Yuki Okamoto, Yuki Tamatsukuri, Hiroki Inoue, Toshihiko Saito, Munehiro Kozuma, Hidetomo Kobayashi, Tatsuya Onuki, Yuichi Yanagisawa, Toshihiko Takeuchi, Yutaka Okazaki, Hitoshi Kunitake, Daiki Nakamura, Takaaki Nagata, Yasumasa Yamane, Makoto Ikeda, Shih-Ci Yen, Chuan-Hua Chang, Wen-Hsiang Hsieh, Hiroshi Yoshida, Min-Cheng Chen, Ming-Han Liao, Shou-Zen Chang, Shunpei Yamazaki

Proceedings of the 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), 2023

Soft- and Hard-Error Radiation Reliability of 228 KB $3\mathrm{T}+1\mathrm{C}$ Oxide Semiconductor Memory.

H. Takahashi, Y. Okamoto, Toshiki Hamada, Yusuke Komura, S. Watanabe, K. Tsuda, H. Sawai, Takanori Matsuzaki, Yoshinori Ando, Tatsuya Onuki, Hitoshi Kunitake, Shunpei Yamazaki, D. Kobayashi, A. Ikuta, Takahiro Makino, Takeshi Ohshima

Proceedings of the IEEE International Reliability Physics Symposium, 2023

2017

Embedded Memory and ARM Cortex-M0 Core Using 60-nm C-Axis Aligned Crystalline Indium-Gallium-Zinc Oxide FET Integrated With 65-nm Si CMOS.

Tatsuya Onuki, Wataru Uesugi, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki

IEEE J. Solid State Circuits, 2017

2016

Embedded memory and ARM Cortex-M0 core using 60-nm C-axis aligned crystalline indium-gallium-zinc oxide FET integrated with 65-nm Si CMOS.

Tatsuya Onuki, Wataru Uesugi, Hikaru Tamura, Atsuo Isobe, Yoshinori Ando, Satoru Okamoto, Kiyoshi Kato, Tri Rung Yew, Chen Bin Lin, J. Y. Wu, Chi Chang Shuai, Shao Hui Wu, James Myers, Klaus Doppler, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the 2016 IEEE Symposium on VLSI Circuits, 2016

2015

16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.

Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor.

Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Atsushi Hirose, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the Symposium on VLSI Circuits, 2014

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2012

Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor.

Hiroki Inoue, Takanori Matsuzaki, Shuhei Nagatsuka, Yutaka Okazaki, Toshinari Sasaki, Kousei Noda, Daisuke Matsubayashi, Takahiko Ishizu, Tatsuya Onuki, Atsuo Isobe, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Jun Koyama, Shunpei Yamazaki

IEEE J. Solid State Circuits, 2012