Takahiko Ishizu

According to our database, Takahiko Ishizu authored at least 8 papers between 2012 and 2019.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2019

A 48 MHz 880-nW Standby Power Normally-Off MCU with 1 Clock Full Backup and 4.69-μs Wakeup Featuring 60-nm Crystalline In-Ga-Zn Oxide BEOL-FETs.

Takahiko Ishizu, Yuto Yakubo, Kazuma Furutani, Atsuo Isobe, Masashi Fujita, Tomoaki Atsumi, Yoshinori Ando, Tsutomu Murakawa, Kiyoshi Kato, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019, 2019

Micro Short-Circuit Detector Including S/H Circuit for 1hr Retention and 52dB Comparator Composed of C-Axis Aligned Crystalline IGZO FETs for Li-Ion Battery Protection IC.

Hiroki Inoue, Takeshi Aoki, Fumika Akasawa, Toshiki Hamada, Toshihiko Takeuchi, Kousei Nei, Takako Seki, Yuto Yakubo, Kei Takahashi, Shuji Fukai, Takahiko Ishizu, Munehiro Kozuma, Ryota Tajima, Takanori Matsuzaki, Takayuki Ikeda, Makoto Ikeda, Shunpei Yamazaki

Proceedings of the IEEE International Solid- State Circuits Conference, 2019

2018

A 20ns-write 45ns-read and 10¹⁴-cycle endurance memory module composed of 60nm crystalline oxide semiconductor transistors.

Shuhei Maeda, Satoru Ohshita, Kazuma Furutani, Yuto Yakubo, Takahiko Ishizu, Tomoaki Atsumi, Yoshinori Ando, Daisuke Matsubayashi, Kiyoshi Kato, Takashi Okuda, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the 2018 IEEE International Solid-State Circuits Conference, 2018

2015

16.9 A 128kb 4b/cell nonvolatile memory with crystalline In-Ga-Zn oxide FET using Vt, cancel write method.

Takanori Matsuzaki, Tatsuya Onuki, Shuhei Nagatsuka, Hiroki Inoue, Takahiko Ishizu, Yoshinori Ieda, Naoto Yamade, Hidekazu Miyairi, Masayuki Sakakura, Tomoaki Atsumi, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Yoshitaka Yamamoto, Masahiro Fujita, Jun Koyama, Shunpei Yamazaki

Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014

Embedded SRAM and Cortex-M0 Core Using a 60-nm Crystalline Oxide Semiconductor.

Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Wataru Uesugi, Atsuo Isobe, Naoaki Tsutsui, Yasutaka Suzuki, Yutaka Okazaki, Yukio Maehashi, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki, Masahiro Fujita, James Myers, Pekka Korpinen

IEEE Micro, 2014

A 32-bit CPU with zero standby power and 1.5-clock sleep/2.5-clock wake-up achieved by utilizing a 180-nm C-axis aligned crystalline In-Ga-Zn oxide transistor.

Atsuo Isobe, Hikaru Tamura, Kiyoshi Kato, Takuro Ohmaru, Wataru Uesugi, Takahiko Ishizu, Tatsuya Onuki, Kazuaki Ohshima, Takanori Matsuzaki, Atsushi Hirose, Yasutaka Suzuki, Naoaki Tsutsui, Tomoaki Atsumi, Yutaka Shionoiri, Gensuke Goto, Jun Koyama, Masahiro Fujita, Shunpei Yamazaki

Proceedings of the Symposium on VLSI Circuits, 2014

Embedded SRAM and Cortex-M0 core with backup circuits using a 60-nm crystalline oxide semiconductor for power gating.

Hikaru Tamura, Kiyoshi Kato, Takahiko Ishizu, Tatsuya Onuki, Wataru Uesugi, Takuro Ohmaru, Kazuaki Ohshima, Hidetomo Kobayashi, Seiichi Yoneda, Atsuo Isobe, Naoaki Tsutsui, Suguru Hondo, Yasutaka Suzuki, Yutaka Okazaki, Tomoaki Atsumi, Yutaka Shionoiri, Yukio Maehashi, Gensuke Goto, Masahiro Fujita, James Myers, Pekka Korpinen, Jun Koyama, Yoshitaka Yamamoto, Shunpei Yamazaki

Proceedings of the 2014 IEEE Symposium on Low-Power and High-Speed Chips, 2014

2012

Nonvolatile Memory With Extremely Low-Leakage Indium-Gallium-Zinc-Oxide Thin-Film Transistor.

Hiroki Inoue, Takanori Matsuzaki, Shuhei Nagatsuka, Yutaka Okazaki, Toshinari Sasaki, Kousei Noda, Daisuke Matsubayashi, Takahiko Ishizu, Tatsuya Onuki, Atsuo Isobe, Yutaka Shionoiri, Kiyoshi Kato, Takashi Okuda, Jun Koyama, Shunpei Yamazaki

IEEE J. Solid State Circuits, 2012