Ko Yoshikawa

According to our database1, Ko Yoshikawa authored at least 7 papers between 1991 and 2006.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2006
Domino Logic Synthesis System and its Applications.
Journal of Circuits, Systems, and Computers, 2006

Budgeting-free hierarchical design method for large scale and high-performance LSIs.
Proceedings of the 43rd Design Automation Conference, 2006

2005
An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs.
IEICE Transactions, 2005

2004
A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication.
Proceedings of the 41th Design Automation Conference, 2004

Timing optimization by replacing flip-flops to latches.
Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

1999
Logic Synthesizer with Optimizations in Two Phases.
Proceedings of the VLSI Handbook., 1999

1991
Timing Optimization on Mapped Circuits.
Proceedings of the 28th Design Automation Conference, 1991


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