Koutaro Hachiya

According to our database, Koutaro Hachiya authored at least 21 papers between 1997 and 2023.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2023

Bayesian neural network based inductance calculations of wireless power transfer systems.

Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa

IEICE Electron. Express, 2023

Electronic component placement optimization for heat measures of smartglasses.

Kyosuke Kusumi, Koutaro Hachiya, Ryotaro Kudo, Toshiki Kanamoto, Atsushi Kurokawa

IEICE Electron. Express, 2023

A parabolic spiral coil transmitter with uniform magnetic field for smart devices.

Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa

IEICE Electron. Express, 2023

Measurement Point Selection Algorithms for Testing Power TSVs.

Koutaro Hachiya

Proceedings of the IEEE International 3D Systems Integration Conference, 2023

2022

A bernoulli spiral coil transmitter for charging various small electronic devices.

Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa

IEICE Electron. Express, 2022

Receiver coil built into belt for heat dissipation of watch-type smart devices.

Shinsuke Kashiwazaki, Koutaro Hachiya, Toshiki Kanamoto, Ryosuke Watanabe, Atsushi Kurokawa

IEICE Electron. Express, 2022

Deep Neural Network Based Inductance Calculations of Wireless Power Transfer Systems.

Kai Sato, Toshiki Kanamoto, Ryotaro Kudo, Koutaro Hachiya, Atsushi Kurokawa

Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

A Parabolic Spiral Coil Transmitter for Charging Multiple Receivers.

Ryotaro Kudo, Koutaro Hachiya, Toshiki Kanamoto, Atsushi Kurokawa

Proceedings of the 11th IEEE Global Conference on Consumer Electronics, 2022

2021

Effective methods to promote heat dissipation of wrist wearables.

Kodai Matsuhashi, Koutaro Hachiya, Toshiki Kanamoto, Shinsuke Kashiwazaki, Kyosuke Kusumi, Atsushi Kurokawa

IEICE Electron. Express, 2021

2020

Thermal placement on PCB of components including 3D ICs.

Yuuta Satomi, Koutaro Hachiya, Toshiki Kanamoto, Ryosuke Watanabe, Atsushi Kurokawa

IEICE Electron. Express, 2020

Testing Through Silicon Vias in Power Distribution Network of 3D-IC with Manufacturing Variability Cancellation.

Koutaro Hachiya, Atsushi Kurokawa

Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

A Method to Detect Open Defects in Wire Segments of On-Chip Power Grids.

Koutaro Hachiya

Proceedings of the 29th IEEE Asian Test Symposium, 2020

2019

Variability Cancellation to Improve Diagnostic Performance of Testing through Silicon Vias in Power Distribution Network of 3D-IC.

Koutaro Hachiya, Atsushi Kurokawa

Proceedings of the 2019 International 3D Systems Integration Conference (3DIC), 2019

2010

Impact of Self-Heating in Wire Interconnection on Timing.

Toshiki Kanamoto, Takaaki Okumura, Katsuhiro Furukawa, Hiroshi Takafuji, Atsushi Kurokawa, Koutaro Hachiya, Tsuyoshi Sakata, Masakazu Tanaka, Hidenari Nakashima, Hiroo Masuda, Takashi Sato, Masanori Hashimoto

IEICE Trans. Electron., 2010

2009

An Approach for Reducing Leakage Current Variation due to Manufacturing Variability.

Tsuyoshi Sakata, Takaaki Okumura, Atsushi Kurokawa, Hidenari Nakashima, Hiroo Masuda, Takashi Sato, Masanori Hashimoto, Koutaro Hachiya, Katsuhiro Furukawa, Masakazu Tanaka, Hiroshi Takafuji, Toshiki Kanamoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009

2007

Fast Methods to Estimate Clock Jitter due to Power Supply Noise.

Koutaro Hachiya, Takayuki Ohshima, Hidenari Nakashima, Masaaki Soda, Satoshi Goto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

2006

Impact of Intrinsic Parasitic Extraction Errors on Timing and Noise Estimation.

Toshiki Kanamoto, Shigekiyo Akutsu, Tamiyo Nakabayashi, Takahiro Ichinomiya, Koutaro Hachiya, Atsushi Kurokawa, Hiroshi Ishikawa, Sakae Muromoto, Hiroyuki Kobayashi, Masanori Hashimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

A Method to Derive SSO Design Rule Considering Jitter Constraint.

Koutaro Hachiya, Hiroyuki Kobayashi, Takaaki Okumura, Takashi Sato, Hiroki Oka

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2006

2005

On-Chip Thermal Gradient Analysis and Temperature Flattening for SoC Design.

Takashi Sato, Junji Ichimiya, Nobuto Ono, Koutaro Hachiya, Masanori Hashimoto

IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2005

Parallel iterative solvers for sparse linear systems in circuit simulation.

Achim Basermann, Uwe Jaekel, M. Nordhausen, Koutaro Hachiya

Future Gener. Comput. Syst., 2005

1997

Enhancement of parallelism for tearing-based circuit simulation.

Koutaro Hachiya, Toshiyuki Saito, Toshiyuki Nakata, Norio Tanabe

Proceedings of the ASP-DAC '97 Asia and South Pacific Design Automation Conference, 1997