Krzysztof Kepa

Orcid: 0000-0003-0702-9570

According to our database1, Krzysztof Kepa authored at least 19 papers between 2006 and 2018.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Bibliography

2018
Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018

2015
Inferring custom architectures from OpenCL.
Proceedings of the 25th International Workshop on Power and Timing Modeling, 2015

2014
Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devices.
Microelectron. J., 2014

FPGA-based accelerator development for non-engineers.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

On the performance and energy efficiency of FPGAs and GPUs for polyphase channelization.
Proceedings of the 2014 International Conference on ReConFigurable Computing and FPGAs, 2014

2013
FPGA-based HPC application design for non-experts.
Proceedings of the 24th IEEE International Symposium on Rapid System Prototyping, 2013

FPGA-based HPC application design for non-experts (abstract only).
Proceedings of the 2013 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2013

Enabling development of OpenCL applications on FPGA platforms.
Proceedings of the 24th International Conference on Application-Specific Systems, 2013

2011
Temperature-based covert channel in FPGA systems.
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011

Remote FPGA Lab with Interactive Control and Visualisation Interface.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

ERDB: An Embedded Routing Database for Reconfigurable Systems.
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011

2010
Design Assurance Strategy and Toolset for Partially Reconfigurable FPGA Systems.
ACM Trans. Reconfigurable Technol. Syst., 2010

SeReCon: a secure reconfiguration controller for self-reconfigurable systems.
Int. J. Crit. Comput. Based Syst., 2010

2009
IP protection in Partially Reconfigurable FPGAs.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing.
Proceedings of the Reconfigurable Computing: Architectures, 2009

2008
SeReCon: A Secure Dynamic Partial Reconfiguration Controller.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008

SeReCon: A Trusted Environment for SoPC Design.
Proceedings of the Third International Conference on Dependability of Computer Systems, 2008

2007
Run-Time Management of Reconfigurable Hardware Tasks Using Embedded Linux.
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007

2006
Transparent Management of Reconfigurable Hardware in Embedded Operating Systems.
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006


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