Fearghal Morgan
According to our database1,
Fearghal Morgan
authored at least 48 papers
between 2001 and 2021.
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Bibliography
2021
2018
Web-Based Interfaces for Virtual C. elegans Neuron Model Definition, Network Configuration, Behavioral Experiment Definition and Experiment Results Visualization.
Frontiers Neuroinformatics, 2018
Vicilogic 2.0: Online Learning and Prototyping of Digital Systems Using PYNQ-Z1/-Z2 SoC.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018
2017
Rapid application prototyping for hardware modular spiking neural network architectures.
Neural Comput. Appl., 2017
Proceedings of the International Conference on Recent Achievements in Mechatronics, 2017
2016
Proceedings of the 2016 IEEE Symposium Series on Computational Intelligence, 2016
Embedded Real-time Implementation of a Computational Efficient Optical Flow Extraction Method for Intelligent Robot Control Applications.
Proceedings of the 24th Irish Conference on Artificial Intelligence and Cognitive Science, 2016
2015
Proceedings of the 3rd International Congress on Neurotechnology, 2015
2014
Neuron Models in FPGA Hardware - A Route from High Level Descriptions to Hardware Implementations.
Proceedings of the 2nd International Congress on Neurotechnology, 2014
Exploring Neural Principles with Si elegans, a Neuromimetic Representation of the Nematode Caenorhabditis elegans.
Proceedings of the 2nd International Congress on Neurotechnology, 2014
The Si elegans Project - The Challenges and Prospects of Emulating Caenorhabditis elegans.
Proceedings of the Biomimetic and Biohybrid Systems - Third International Conference, 2014
2013
Scalable Hierarchical Network-on-Chip Architecture for Spiking Neural Network Hardware Implementations.
IEEE Trans. Parallel Distributed Syst., 2013
Fixed latency on-chip interconnect for hardware spiking neural network architectures.
Parallel Comput., 2013
Modular Neural Tile Architecture for Compact Embedded Hardware Spiking Neural Network.
Neural Process. Lett., 2013
Proceedings of the Twelfth European Conference on the Synthesis and Simulation of Living Systems: Advances in Artificial Life, 2013
2012
ACM Trans. Reconfigurable Technol. Syst., 2012
Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers.
Neural Networks, 2012
Hierarchical Network-on-Chip and Traffic Compression for Spiking Neural Network Implementations.
Proceedings of the 2012 Sixth IEEE/ACM International Symposium on Networks-on-Chip (NoCS), 2012
2011
Maintaining Healthy Population Diversity Using Adaptive Crossover, Mutation, and Selection.
IEEE Trans. Evol. Comput., 2011
Genet. Program. Evolvable Mach., 2011
Proceedings of the 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip, 2011
Addressing the Hardware Resource Requirements of Network-on-chip based Neural Architectures.
Proceedings of the NCTA 2011, 2011
Adaptive Routing Strategies for Large Scale Spiking Neural Network Hardware Implementations.
Proceedings of the Artificial Neural Networks and Machine Learning - ICANN 2011, 2011
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
Proceedings of the International Conference on Field Programmable Logic and Applications, 2011
2010
ACM Trans. Reconfigurable Technol. Syst., 2010
Int. J. Crit. Comput. Based Syst., 2010
Proceedings of the 2010 International Symposium on System on Chip, SoC 2010, Tampere, 2010
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations.
Proceedings of the Evolvable Systems: From Biology to Hardware, 2010
2009
A Reconfigurable and Biologically Inspired Paradigm for Computation Using Network-On-Chip and Spiking Neural Networks.
Int. J. Reconfigurable Comput., 2009
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
Proceedings of the IEEE Congress on Evolutionary Computation, 2009
FPGA Analysis Tool: High-Level Flows for Low-Level Design Analysis in Reconfigurable Computing.
Proceedings of the Reconfigurable Computing: Architectures, 2009
2008
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2008
Proceedings of the Evolvable Systems: From Biology to Hardware, 2008
Reconfigurable analogue hardware evolution of adaptive spiking neural network controllers.
Proceedings of the Genetic and Evolutionary Computation Conference, 2008
Proceedings of the Genetic and Evolutionary Computation Conference, 2008
Reconfigurable platforms and the challenges for large-scale implementations of spiking neural networks.
Proceedings of the FPL 2008, 2008
Proceedings of the Third International Conference on Dependability of Computer Systems, 2008
2007
Proceedings of the 2007 International Conference on Field-Programmable Technology, 2007
Reconfigurable Hardware Evolution Platform for a Spiking Neural Network Robotics Controller.
Proceedings of the Reconfigurable Computing: Architectures, 2007
2006
Proceedings of the 2006 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2006), 2006
Intrinsic Hardware Evolution of Neural Networks in Reconfigurable Analogue and Digital Devices.
Proceedings of the 14th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2006), 2006
2005
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005
Applied VHDL training methodology, EDA framework and hardware implementation platform.
Proceedings of the 2005 International Conference on Reconfigurable Computing and FPGAs, 2005
2001
Proceedings of the 2001 International Conference on Image Processing, 2001