Kshitij Sudan

Affiliations:
  • University of Utah, Salt Lake City, Utah, USA


According to our database1, Kshitij Sudan authored at least 13 papers between 2007 and 2013.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Bibliography

2013
Data Placement for Efficient Main Memory Access.
PhD thesis, 2013

A novel system architecture for web scale applications using lightweight CPUs and virtualized I/O.
Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2012
Tiered Memory: An Iso-Power Memory Architecture to Address the Memory Power Wall.
IEEE Trans. Computers, 2012

Managing Data Placement in Memory Systems with Multiple Memory Controllers.
Int. J. Parallel Program., 2012

Efficient scrub mechanisms for error-prone emerging memories.
Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

Optimizing datacenter power with memory system levers for guaranteed quality-of-service.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011
Understanding the Behavior of Pthread Applications on Non-Uniform Cache Architectures.
Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010
Hardware prediction of OS run-length for fine-grained resource customization.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2010

Improving Server Performance on Multi-cores via Selective Off-Loading of OS Functionality.
Proceedings of the Computer Architecture, 2010

Micro-pages: increasing DRAM efficiency with locality-aware data placement.
Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

Handling the problems and opportunities posed by multiple on-chip memory controllers.
Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009
Dynamic hardware-assisted software-controlled page placement to manage capacity allocation and sharing within large caches.
Proceedings of the 15th International Conference on High-Performance Computer Architecture (HPCA-15 2009), 2009

2007
A Parallel Algorithm for Discrete Gabor Transforms.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 2007


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