David W. Nellans

According to our database, David W. Nellans authored at least 40 papers between 2004 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2023

Architectural Support for Optimizing Huge Page Selection Within the OS.

Aninda Manocha, Zi Yan, Esin Tureci, Juan L. Aragón, David W. Nellans, Margaret Martonosi

Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023

FinePack: Transparently Improving the Efficiency of Fine-Grained Transfers in Multi-GPU Systems.

Harini Muthukrishnan, Daniel Lustig, Oreste Villa, Thomas F. Wenisch, David W. Nellans

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023

Parsimony: Enabling SIMD/Vector Programming in Standard Compiler Flows.

Vijay Kandiah, Daniel Lustig, Oreste Villa, David W. Nellans, Nikos Hardavellas

Proceedings of the 21st ACM/IEEE International Symposium on Code Generation and Optimization, 2023

2022

GPU Domain Specialization via Composable On-Package Architecture.

Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler

ACM Trans. Archit. Code Optim., 2022

The Implications of Page Size Management on Graph Analytics.

Aninda Manocha, Zi Yan, Esin Tureci, Juan L. Aragón, David W. Nellans, Margaret Martonosi

Proceedings of the IEEE International Symposium on Workload Characterization, 2022

2021

GPS: A Global Publish-Subscribe Model for Multi-GPU Memory Management.

Harini Muthukrishnan, Daniel Lustig, David W. Nellans, Thomas F. Wenisch

Proceedings of the MICRO '21: 54th Annual IEEE/ACM International Symposium on Microarchitecture, 2021

Efficient Multi-GPU Shared Memory via Automatic Optimization of Fine-Grained Transfers.

Harini Muthukrishnan, David W. Nellans, Daniel Lustig, Jeffrey A. Fessler, Thomas F. Wenisch

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator.

Oreste Villa, Daniel Lustig, Zi Yan, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Nan Jiang, David W. Nellans

Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2021

2020

The Architectural Implications of Distributed Reinforcement Learning on CPU-GPU Systems.

Ahmet Fatih Inci, Evgeny Bolotin, Yaosheng Fu, Gal Dalal, Shie Mannor, David W. Nellans, Diana Marculescu

CoRR, 2020

Locality-Centric Data and Threadblock Management for Massive GPUs.

Mahmoud Khairy, Vadim Nikiforov, David W. Nellans, Timothy G. Rogers

Proceedings of the 53rd Annual IEEE/ACM International Symposium on Microarchitecture, 2020

Buddy Compression: Enabling Larger Memory for Deep Learning and HPC Workloads on GPUs.

Esha Choukse, Michael B. Sullivan, Mike O'Connor, Mattan Erez, Jeff Pool, David W. Nellans, Stephen W. Keckler

Proceedings of the 47th ACM/IEEE Annual International Symposium on Computer Architecture, 2020

HMG: Extending Cache Coherence Protocols Across Modern Hierarchical Multi-GPU Systems.

Xiaowei Ren, Daniel Lustig, Evgeny Bolotin, Aamer Jaleel, Oreste Villa, David W. Nellans

Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2020

2019

Optimizing Multi-GPU Parallelization Strategies for Deep Learning Training.

Saptadeep Pal, Eiman Ebrahimi, Arslan Zulfiqar, Yaosheng Fu, Victor Zhang, Szymon Migacz, David W. Nellans, Puneet Gupta

IEEE Micro, 2019

NVBit: A Dynamic Binary Instrumentation Framework for NVIDIA GPUs.

Oreste Villa, Mark Stephenson, David W. Nellans, Stephen W. Keckler

Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture, 2019

Translation ranger: operating system support for contiguity-aware TLBs.

Zi Yan, Daniel Lustig, David W. Nellans, Abhishek Bhattacharjee

Proceedings of the 46th International Symposium on Computer Architecture, 2019

Understanding the Future of Energy Efficiency in Multi-Module GPUs.

Akhil Arunkumar, Evgeny Bolotin, David W. Nellans, Carole-Jean Wu

Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019

Nimble Page Management for Tiered Memory Systems.

Zi Yan, Daniel Lustig, David W. Nellans, Abhishek Bhattacharjee

Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, 2019

2018

Combining HW/SW Mechanisms to Improve NUMA Performance of Multi-GPU Systems.

Vinson Young, Aamer Jaleel, Evgeny Bolotin, Eiman Ebrahimi, David W. Nellans, Oreste Villa

Proceedings of the 51st Annual IEEE/ACM International Symposium on Microarchitecture, 2018

2017

Beyond the socket: NUMA-aware GPUs.

Ugljesa Milic, Oreste Villa, Evgeny Bolotin, Akhil Arunkumar, Eiman Ebrahimi, Aamer Jaleel, Alex Ramírez, David W. Nellans

Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017

MCM-GPU: Multi-Chip-Module GPUs for Continued Performance Scalability.

Akhil Arunkumar, Evgeny Bolotin, Benjamin Y. Cho, Ugljesa Milic, Eiman Ebrahimi, Oreste Villa, Aamer Jaleel, Carole-Jean Wu, David W. Nellans

Proceedings of the 44th Annual International Symposium on Computer Architecture, 2017

2016

Towards high performance paged memory for GPUs.

Tianhao Zheng, David W. Nellans, Arslan Zulfiqar, Mark Stephenson, Stephen W. Keckler

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

Selective GPU caches to eliminate CPU-GPU HW cache coherence.

Neha Agarwal, David W. Nellans, Eiman Ebrahimi, Thomas F. Wenisch, John Danskin, Stephen W. Keckler

Proceedings of the 2016 IEEE International Symposium on High Performance Computer Architecture, 2016

2015

Designing Efficient Heterogeneous Memory Architectures.

Evgeny Bolotin, David W. Nellans, Oreste Villa, Mike O'Connor, Alex Ramírez, Stephen W. Keckler

IEEE Micro, 2015

Flexible software profiling of GPU architectures.

Mark Stephenson, Siva Kumar Sastry Hari, Yunsup Lee, Eiman Ebrahimi, Daniel R. Johnson, David W. Nellans, Mike O'Connor, Stephen W. Keckler

Proceedings of the 42nd Annual International Symposium on Computer Architecture, 2015

Unlocking bandwidth for GPUs in CC-NUMA systems.

Neha Agarwal, David W. Nellans, Mike O'Connor, Stephen W. Keckler, Thomas F. Wenisch

Proceedings of the 21st IEEE International Symposium on High Performance Computer Architecture, 2015

Page Placement Strategies for GPUs within Heterogeneous Memory Systems.

Neha Agarwal, David W. Nellans, Mark Stephenson, Mike O'Connor, Stephen W. Keckler

Proceedings of the Twentieth International Conference on Architectural Support for Programming Languages and Operating Systems, 2015

2014

Improving Operating System and Hardware Interactions Through Co-Design.

David W. Nellans

PhD thesis, 2014

Scaling the Power Wall: A Path to Exascale.

Oreste Villa, Daniel R. Johnson, Mike O'Connor, Evgeny Bolotin, David W. Nellans, Justin Luitjens, Nikolai Sakharnykh, Peng Wang, Paulius Micikevicius, Anthony Scudiero, Stephen W. Keckler, William J. Dally

Proceedings of the International Conference for High Performance Computing, 2014

2013

Linux block IO: introducing multi-queue SSD access on multi-core systems.

Matias Bjørling, Jens Axboe, David W. Nellans, Philippe Bonnet

Proceedings of the 6th Annual International Systems and Storage Conference, 2013

Better flash access via shape-shifting virtual memory pages.

Anirudh Badam, Vivek S. Pai, David W. Nellans

Proceedings of the First ACM SIGOPS Conference on Timely Results in Operating Systems, 2013

2012

Managing Data Placement in Memory Systems with Multiple Memory Controllers.

Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis

Int. J. Parallel Program., 2012

2011

Beyond block I/O: Rethinking traditional storage primitives.

Xiangyong Ouyang, David W. Nellans, Robert Wipfel, David Flynn, Dhabaleswar K. Panda

Proceedings of the 17th International Conference on High-Performance Computer Architecture (HPCA-17 2011), 2011

Prediction Based DRAM Row-Buffer Management in the Many-Core Era.

Manu Awasthi, David W. Nellans, Rajeev Balasubramonian, Al Davis

Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010

Hardware prediction of OS run-length for fine-grained resource customization.

David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Erik Brunvand

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2010

Improving Server Performance on Multi-cores via Selective Off-Loading of OS Functionality.

David W. Nellans, Kshitij Sudan, Erik Brunvand, Rajeev Balasubramonian

Proceedings of the Computer Architecture, 2010

Micro-pages: increasing DRAM efficiency with locality-aware data placement.

Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis

Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems, 2010

SWEL: hardware cache coherence protocols to map shared data onto shared caches.

Seth H. Pugsley, Josef B. Spjut, David W. Nellans, Rajeev Balasubramonian

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

Handling the problems and opportunities posed by multiple on-chip memory controllers.

Manu Awasthi, David W. Nellans, Kshitij Sudan, Rajeev Balasubramonian, Al Davis

Proceedings of the 19th International Conference on Parallel Architectures and Compilation Techniques, 2010

2009

OS execution on multi-cores: is out-sourcing worthwhile?

David W. Nellans, Rajeev Balasubramonian, Erik Brunvand

ACM SIGOPS Oper. Syst. Rev., 2009

2004

ARCS: an architectural level communication driven simulator.

David W. Nellans, Vamshi Krishna Kadaru, Erik Brunvand

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004