Vijayalakshmi Srinivasan

According to our database, Vijayalakshmi Srinivasan authored at least 67 papers between 1997 and 2024.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2024

14.1 A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC.

Monodeep Kar, Joel Silberman, Swagath Venkataramani, Viji Srinivasan, Bruce M. Fleischer, Joshua Rubin, JohnDavid Lancaster, Sae Kyu Lee, Matthew Cohen, Matthew M. Ziegler, Nianzheng Cao, Sandra Woodward, Ankur Agrawal, Ching Zhou, Prasanth Chatarasi, Thomas Gooding, Michael Guillorn, Bahman Hekmatshoartabari, Philip Jacob, Radhika Jain, Shubham Jain, Jinwook Jung, Kyu-Hyoun Kim, Siyu Koswatta, Martin Lutz, Alberto Mannari, Abey Mathew, Indira Nair, Ashish Ranjan, Zhibin Ren, Scot Rider, Thomas Roewer, David L. Satterfield, Marcel Schaal, Sanchari Sen, Gustavo Tellez, Hung Tran, Wei Wang, Vidhi Zalani, Jintao Zhang, Xin Zhang, Vinay Shah, Robert M. Senger, Arvind Kumar, Pong-Fei Lu, Leland Chang

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022

OnSRAM: Efficient Inter-Node On-Chip Scratchpad Management in Deep Learning Accelerators.

Subhankar Pal, Swagath Venkataramani, Viji Srinivasan, Kailash Gopalakrishnan

ACM Trans. Embed. Comput. Syst., November, 2022

A 7-nm Four-Core Mixed-Precision AI Chip With 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling.

Sae Kyu Lee, Ankur Agrawal, Joel Silberman, Matthew M. Ziegler, Mingu Kang, Swagath Venkataramani, Nianzheng Cao, Bruce M. Fleischer, Michael Guillorn, Matthew Cohen, Silvia M. Mueller, Jinwook Oh, Martin Lutz, Jinwook Jung, Siyu Koswatta, Ching Zhou, Vidhi Zalani, Monodeep Kar, James Bonanno, Robert Casatuta, Chia-Yu Chen, Jungwook Choi, Howard Haynie, Alyssa Herbert, Radhika Jain, Kyu-Hyoun Kim, Yulong Li, Zhibin Ren, Scot Rider, Marcel Schaal, Kerstin Schelm, Michael Scheuermann, Xiao Sun, Hung Tran, Naigang Wang, Wei Wang, Xin Zhang, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang

IEEE J. Solid State Circuits, 2022

Deep Compression of Pre-trained Transformer Models.

Naigang Wang, Chi-Chun (Charlie) Liu, Swagath Venkataramani, Sanchari Sen, Chia-Yu Chen, Kaoutar El Maghraoui, Vijayalakshmi Srinivasan, Leland Chang

Proceedings of the Advances in Neural Information Processing Systems 35: Annual Conference on Neural Information Processing Systems 2022, 2022

2021

A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling.

Ankur Agrawal, Sae Kyu Lee, Joel Silberman, Matthew M. Ziegler, Mingu Kang, Swagath Venkataramani, Nianzheng Cao, Bruce M. Fleischer, Michael Guillorn, Matt Cohen, Silvia M. Mueller, Jinwook Oh, Martin Lutz, Jinwook Jung, Siyu Koswatta, Ching Zhou, Vidhi Zalani, James Bonanno, Robert Casatuta, Chia-Yu Chen, Jungwook Choi, Howard Haynie, Alyssa Herbert, Radhika Jain, Monodeep Kar, Kyu-Hyoun Kim, Yulong Li, Zhibin Ren, Scot Rider, Marcel Schaal, Kerstin Schelm, Michael Scheuermann, Xiao Sun, Hung Tran, Naigang Wang, Wei Wang, Xin Zhang, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Leland Chang, Kailash Gopalakrishnan

Proceedings of the IEEE International Solid-State Circuits Conference, 2021

Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators.

Subhankar Pal, Swagath Venkataramani, Viji Srinivasan, Kailash Gopalakrishnan

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

RaPiD: AI Accelerator for Ultra-low Precision Training and Inference.

Swagath Venkataramani, Vijayalakshmi Srinivasan, Wei Wang, Sanchari Sen, Jintao Zhang, Ankur Agrawal, Monodeep Kar, Shubham Jain, Alberto Mannari, Hoang Tran, Yulong Li, Eri Ogawa, Kazuaki Ishizaki, Hiroshi Inoue, Marcel Schaal, Mauricio J. Serrano, Jungwook Choi, Xiao Sun, Naigang Wang, Chia-Yu Chen, Allison Allain, James Bonanno, Nianzheng Cao, Robert Casatuta, Matthew Cohen, Bruce M. Fleischer, Michael Guillorn, Howard Haynie, Jinwook Jung, Mingu Kang, Kyu-Hyoun Kim, Siyu Koswatta, Sae Kyu Lee, Martin Lutz, Silvia M. Mueller, Jinwook Oh, Ashish Ranjan, Zhibin Ren, Scot Rider, Kerstin Schelm, Michael Scheuermann, Joel Silberman, Jie Yang, Vidhi Zalani, Xin Zhang, Ching Zhou, Matthew M. Ziegler, Vinay Shah, Moriyoshi Ohara, Pong-Fei Lu, Brian W. Curran, Sunil Shukla, Leland Chang, Kailash Gopalakrishnan

Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021

2020

Efficient AI System Design With Cross-Layer Approximate Computing.

Swagath Venkataramani, Xiao Sun, Naigang Wang, Chia-Yu Chen, Jungwook Choi, Mingu Kang, Ankur Agarwal, Jinwook Oh, Shubham Jain, Tina Babinsky, Nianzheng Cao, Thomas W. Fox, Bruce M. Fleischer, George Gristede, Michael Guillorn, Howard Haynie, Hiroshi Inoue, Kazuaki Ishizaki, Michael J. Klaiber, Shih-Hsien Lo, Gary W. Maier, Silvia M. Mueller, Michael Scheuermann, Eri Ogawa, Marcel Schaal, Mauricio J. Serrano, Joel Silberman, Christos Vezyrtzis, Wei Wang, Fanchieh Yee, Jintao Zhang, Matthew M. Ziegler, Ching Zhou, Moriyoshi Ohara, Pong-Fei Lu, Brian W. Curran, Sunil Shukla, Vijayalakshmi Srinivasan, Leland Chang, Kailash Gopalakrishnan

Proc. IEEE, 2020

A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference.

Jinwook Oh, Sae Kyu Lee, Mingu Kang, Matthew M. Ziegler, Joel Silberman, Ankur Agrawal, Swagath Venkataramani, Bruce M. Fleischer, Michael Guillorn, Jungwook Choi, Wei Wang, Silvia M. Mueller, Shimon Ben-Yehuda, James Bonanno, Nianzheng Cao, Robert Casatuta, Chia-Yu Chen, Matt Cohen, Ophir Erez, Thomas W. Fox, George Gristede, Howard Haynie, Vicktoria Ivanov, Siyu Koswatta, Shih-Hsien Lo, Martin Lutz, Gary W. Maier, Alex Mesh, Yevgeny Nustov, Scot Rider, Marcel Schaal, Michael Scheuermann, Xiao Sun, Naigang Wang, Fanchieh Yee, Ching Zhou, Vinay Shah, Brian W. Curran, Vijayalakshmi Srinivasan, Pong-Fei Lu, Sunil Shukla, Kailash Gopalakrishnan, Leland Chang

Proceedings of the IEEE Symposium on VLSI Circuits, 2020

Ultra-Low Precision 4-bit Training of Deep Neural Networks.

Xiao Sun, Naigang Wang, Chia-Yu Chen, Jiamin Ni, Ankur Agrawal, Xiaodong Cui, Swagath Venkataramani, Kaoutar El Maghraoui, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan

Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

ScaleCom: Scalable Sparsified Gradient Compression for Communication-Efficient Distributed Training.

Chia-Yu Chen, Jiamin Ni, Songtao Lu, Xiaodong Cui, Pin-Yu Chen, Xiao Sun, Naigang Wang, Swagath Venkataramani, Vijayalakshmi Srinivasan, Wei Zhang, Kailash Gopalakrishnan

Proceedings of the Advances in Neural Information Processing Systems 33: Annual Conference on Neural Information Processing Systems 2020, 2020

2019

DeepTools: Compiler and Execution Runtime Extensions for RaPiD AI Accelerator.

Swagath Venkataramani, Jungwook Choi, Vijayalakshmi Srinivasan, Wei Wang, Jintao Zhang, Marcel Schaal, Mauricio J. Serrano, Kazuaki Ishizaki, Hiroshi Inoue, Eri Ogawa, Moriyoshi Ohara, Leland Chang, Kailash Gopalakrishnan

IEEE Micro, 2019

Hybrid 8-bit Floating Point (HFP8) Training and Inference for Deep Neural Networks.

Xiao Sun, Jungwook Choi, Chia-Yu Chen, Naigang Wang, Swagath Venkataramani, Vijayalakshmi Srinivasan, Xiaodong Cui, Wei Zhang, Kailash Gopalakrishnan

Proceedings of the Advances in Neural Information Processing Systems 32: Annual Conference on Neural Information Processing Systems 2019, 2019

Accurate and Efficient 2-bit Quantized Neural Networks.

Jungwook Choi, Swagath Venkataramani, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan, Zhuo Wang, Pierce Chuang

Proceedings of the Second Conference on Machine Learning and Systems, SysML 2019, 2019

Performance-driven Programming of Multi-TFLOP Deep Learning Accelerators.

Swagath Venkataramani, Jungwook Choi, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan, Leland Chang

Proceedings of the IEEE International Symposium on Workload Characterization, 2019

Workload-aware Automatic Parallelization for Multi-GPU DNN Training.

Sungho Shin, Youngmin Jo, Jungwook Choi, Swagath Venkataramani, Vijayalakshmi Srinivasan, Wonyong Sung

Proceedings of the IEEE International Conference on Acoustics, 2019

Memory and Interconnect Optimizations for Peta-Scale Deep Learning Systems.

Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Philip Heidelberger, Leland Chang, Kailash Gopalakrishnan

Proceedings of the 26th IEEE International Conference on High Performance Computing, 2019

BiScaled-DNN: Quantizing Long-tailed Datastructures with Two Scale Factors for Deep Neural Networks.

Shubham Jain, Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Kailash Gopalakrishnan, Leland Chang

Proceedings of the 56th Annual Design Automation Conference 2019, 2019

A Compiler for Deep Neural Network Accelerators to Generate Optimized Code for a Wide Range of Data Parameters from a Hand-crafted Computation Kernel.

Eri Ogawa, Kazuaki Ishizaki, Hiroshi Inoue, Swagath Venkataramani, Jungwook Choi, Wei Wang, Vijayalakshmi Srinivasan, Moriyoshi Ohara, Kailash Gopalakrishnan

Proceedings of the IEEE Symposium in Low-Power and High-Speed Chips, 2019

2018

Bridging the Accuracy Gap for 2-bit Quantized Neural Networks (QNN).

Jungwook Choi, Pierce I-Jen Chuang, Zhuo Wang, Swagath Venkataramani, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan

CoRR, 2018

PACT: Parameterized Clipping Activation for Quantized Neural Networks.

Jungwook Choi, Zhuo Wang, Swagath Venkataramani, Pierce I-Jen Chuang, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan

CoRR, 2018

A Scalable Multi- TeraOPS Deep Learning Processor Core for AI Trainina and Inference.

Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Vijayalakshmi Srinivasan, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan

Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

Taming the beast: Programming Peta-FLOP class Deep Learning Systems.

Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Kailash Gopalakrishnan, Leland Chang

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Across the Stack Opportunities for Deep Learning Acceleration.

Vijayalakshmi Srinivasan, Bruce M. Fleischer, Sunil Shukla, Matthew M. Ziegler, Joel Silberman, Jinwook Oh, Jungwook Choi, Silvia M. Mueller, Ankur Agrawal, Tina Babinsky, Nianzheng Cao, Chia-Yu Chen, Pierce Chuang, Thomas W. Fox, George Gristede, Michael Guillorn, Howard Haynie, Michael J. Klaiber, Dongsoo Lee, Shih-Hsien Lo, Gary W. Maier, Michael Scheuermann, Swagath Venkataramani, Christos Vezyrtzis, Naigang Wang, Fanchieh Yee, Ching Zhou, Pong-Fei Lu, Brian W. Curran, Leland Chang, Kailash Gopalakrishnan

Proceedings of the International Symposium on Low Power Electronics and Design, 2018

Exploiting approximate computing for deep learning acceleration.

Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Viji Srinivasan, Swagath Venkataramani

Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

Compensated-DNN: energy efficient low-precision deep neural networks by compensating quantization errors.

Shubham Jain, Swagath Venkataramani, Vijayalakshmi Srinivasan, Jungwook Choi, Pierce Chuang, Leland Chang

Proceedings of the 55th Annual Design Automation Conference, 2018

2017

Special Issue on Network and Parallel Computing.

Vijayalakshmi Srinivasan, Yunquan Zhang

Int. J. Parallel Program., 2017

Needle: Leveraging Program Analysis to Analyze and Extract Accelerators from Whole Programs.

Snehasish Kumar, Nick Sumner, Vijayalakshmi Srinivasan, Steve Margerm, Arrvindh Shriraman

Proceedings of the 2017 IEEE International Symposium on High Performance Computer Architecture, 2017

Accelerator Design for Deep Learning Training: Extended Abstract: Invited.

Ankur Agrawal, Chia-Yu Chen, Jungwook Choi, Kailash Gopalakrishnan, Jinwook Oh, Sunil Shukla, Viji Srinivasan, Swagath Venkataramani, Wei Zhang

Proceedings of the 54th Annual Design Automation Conference, 2017

POSTER: Design Space Exploration for Performance Optimization of Deep Neural Networks on Shared Memory Accelerators.

Swagath Venkataramani, Jungwook Choi, Vijayalakshmi Srinivasan, Kailash Gopalakrishnan, Leland Chang

Proceedings of the 26th International Conference on Parallel Architectures and Compilation Techniques, 2017

2016

Co-designing accelerators and SoC interfaces using gem5-Aladdin.

Yakun Sophia Shao, Sam Likun Xi, Vijayalakshmi Srinivasan, Gu-Yeon Wei, David M. Brooks

Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture, 2016

Peruse and Profit: Estimating the Accelerability of Loops.

Snehasish Kumar, Vijayalakshmi Srinivasan, Amirali Sharifian, Nick Sumner, Arrvindh Shriraman

Proceedings of the 2016 International Conference on Supercomputing, 2016

Approximate computing: Challenges and opportunities.

Ankur Agrawal, Jungwook Choi, Kailash Gopalakrishnan, Suyog Gupta, Ravi Nair, Jinwook Oh, Daniel A. Prener, Sunil Shukla, Vijayalakshmi Srinivasan, Zehra Sura

Proceedings of the IEEE International Conference on Rebooting Computing, 2016

2015

Self-contained, accurate precomputation prefetching.

Islam Atta, Xin Tong, Vijayalakshmi Srinivasan, Ioana Baldini, Andreas Moshovos

Proceedings of the 48th International Symposium on Microarchitecture, 2015

DASX: Hardware Accelerator for Software Data Structures.

Snehasish Kumar, Naveen Vedula, Arrvindh Shriraman, Vijayalakshmi Srinivasan

Proceedings of the 29th ACM on International Conference on Supercomputing, 2015

2014

Comparing Implementations of Near-Data Computing with In-Memory MapReduce Workloads.

Seth H. Pugsley, Jeffrey Jestes, Rajeev Balasubramonian, Vijayalakshmi Srinivasan, Alper Buyuktosunoglu, Al Davis, Feifei Li

IEEE Micro, 2014

NDC: Analyzing the impact of 3D-stacked memory+logic devices on MapReduce workloads.

Seth H. Pugsley, Jeffrey Jestes, Huihui Zhang, Rajeev Balasubramonian, Vijayalakshmi Srinivasan, Alper Buyuktosunoglu, Al Davis, Feifei Li

Proceedings of the 2014 IEEE International Symposium on Performance Analysis of Systems and Software, 2014

SQRL: hardware accelerator for collecting software data structures.

Snehasish Kumar, Arrvindh Shriraman, Vijayalakshmi Srinivasan, Dan Lin, Jordon Phillips

Proceedings of the International Conference on Parallel Architectures and Compilation, 2014

2013

RECAP: A region-based cure for the common cold (cache).

Jason Zebchuk, Harold W. Cain, Xin Tong, Vijayalakshmi Srinivasan, Andreas Moshovos

Proceedings of the 19th IEEE International Symposium on High Performance Computer Architecture, 2013

2012

Programming with relaxed synchronization.

Lakshminarayanan Renganarayana, Vijayalakshmi Srinivasan, Ravi Nair, Daniel A. Prener

Proceedings of the 2012 ACM workshop on Relaxing synchronization for multicore and manycore scalability, 2012

Efficient scrub mechanisms for error-prone emerging memories.

Manu Awasthi, Manjunath Shevgoor, Kshitij Sudan, Bipin Rajendran, Rajeev Balasubramonian, Viji Srinivasan

Proceedings of the 18th IEEE International Symposium on High Performance Computer Architecture, 2012

ReCaP: a region-based cure for the common cold cache.

Jason Zebchuk, Harold W. Cain, Vijayalakshmi Srinivasan, Andreas Moshovos

Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2011

Big Chips.

Andrew B. Kahng, Vijayalakshmi Srinivasan

IEEE Micro, 2011

SPATL: Honey, I Shrunk the Coherence Directory.

Hongzhou Zhao, Arrvindh Shriraman, Sandhya Dwarkadas, Vijayalakshmi Srinivasan

Proceedings of the 2011 International Conference on Parallel Architectures and Compilation Techniques, 2011

2010

SAFER: Stuck-At-Fault Error Recovery for Memories.

Nak Hee Seong, Dong Hyuk Woo, Vijayalakshmi Srinivasan, Jude A. Rivers, Hsien-Hsin S. Lee

Proceedings of the 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 2010

2009

A tagless coherence directory.

Jason Zebchuk, Vijayalakshmi Srinivasan, Moinuddin K. Qureshi, Andreas Moshovos

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling.

Moinuddin K. Qureshi, John P. Karidis, Michele Franceschini, Vijayalakshmi Srinivasan, Luis A. Lastras, Bülent Abali

Proceedings of the 42st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-42 2009), 2009

Scalable high performance main memory system using phase-change memory technology.

Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, Jude A. Rivers

Proceedings of the 36th International Symposium on Computer Architecture (ISCA 2009), 2009

2008

Analyzing the Cost of a Cache Miss Using Pipeline Spectroscopy.

Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Vijayalakshmi Srinivasan, Arthur Nadas

J. Instr. Level Parallelism, 2008

On the Nature of Cache Miss Behavior: Is It √2?

Allan Hartstein, Vijayalakshmi Srinivasan, Thomas R. Puzak, Philip G. Emma

J. Instr. Level Parallelism, 2008

2007

Pipeline spectroscopy.

Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan, Arthur Nadas

Proceedings of the Workshop on Experimental Computer Science, 2007

An analysis of the effects of miss clustering on the cost of a cache miss.

Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan, Jim Mitchell

Proceedings of the 4th Conference on Computing Frontiers, 2007

2006

Cache miss behavior: is it sqrt(2)?

Allan Hartstein, Viji Srinivasan, Thomas R. Puzak, Philip G. Emma

Proceedings of the Third Conference on Computing Frontiers, 2006

2005

Exploring the limits of prefetching.

Philip G. Emma, Allan Hartstein, Thomas R. Puzak, Viji Srinivasan

IBM J. Res. Dev., 2005

When prefetching improves/degrades performance.

Thomas R. Puzak, Allan Hartstein, Philip G. Emma, Viji Srinivasan

Proceedings of the Second Conference on Computing Frontiers, 2005

2004

Integrated Analysis of Power and Performance for Pipelined Microprocessors.

Victor V. Zyuban, David M. Brooks, Viji Srinivasan, Michael Gschwind, Pradip Bose, Philip N. Strenski, Philip G. Emma

IEEE Trans. Computers, 2004

A Prefetch Taxonomy.

Viji Srinivasan, Edward S. Davidson, Gary S. Tyson

IEEE Trans. Computers, 2004

Microarchitectural techniques for power gating of execution units.

Zhigang Hu, Alper Buyuktosunoglu, Viji Srinivasan, Victor V. Zyuban, Hans M. Jacobson, Pradip Bose

Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004

2003

New methodology for early-stage, microarchitecture-level power-performance analysis of microprocessors.

David M. Brooks, Pradip Bose, Viji Srinivasan, Michael Gschwind, Philip G. Emma, Michael G. Rosenfield

IBM J. Res. Dev., 2003

Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches.

Rajeev Balasubramonian, Viji Srinivasan, Sandhya Dwarkadas, Alper Buyuktosunoglu

Proceedings of the Power-Aware Computer Systems, Third International Workshop, 2003

2002

Early-Stage Definition of LPX: A Low Power Issue-Execute Processor.

Pradip Bose, David M. Brooks, Alper Buyuktosunoglu, Peter W. Cook, K. Das, Philip G. Emma, Michael Gschwind, Hans M. Jacobson, Tejas Karkhanis, Prabhakar Kudva, Stanley Schuster, James E. Smith, Viji Srinivasan, Victor V. Zyuban, David H. Albonesi, Sandhya Dwarkadas

Proceedings of the Power-Aware Computer Systems, Second International Workshop, 2002

Optimizing pipelines for power and performance.

Viji Srinivasan, David M. Brooks, Michael Gschwind, Pradip Bose, Victor V. Zyuban, Philip N. Strenski, Philip G. Emma

Proceedings of the 35th Annual International Symposium on Microarchitecture, 2002

2001

Hardware solutions to reduce effective memory access time.

Vijayalakshmi Srinivasan

PhD thesis, 2001

Branch History Guided Instruction Prefetching.

Viji Srinivasan, Edward S. Davidson, Gary S. Tyson, Mark J. Charney, Thomas R. Puzak

Proceedings of the Seventh International Symposium on High-Performance Computer Architecture (HPCA'01), 2001

1999

Active Management of Data Caches by Exploiting Reuse Information.

Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson

IEEE Trans. Computers, 1999

1998

Evaluating the performance of active cache management schemes.

Edward S. Tam, Jude A. Rivers, Vijayalakshmi Srinivasan, Gary S. Tyson, Edward S. Davidson

Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

1997

Towards a Communication Characterization Methodology for Parallel Applications.

Sucheta Chodnekar, Viji Srinivasan, Aniruddha S. Vaidya, Anand Sivasubramaniam, Chita R. Das

Proceedings of the 3rd IEEE Symposium on High-Performance Computer Architecture (HPCA '97), 1997