Kuan-Yu Liao

According to our database, Kuan-Yu Liao authored at least 14 papers between 2009 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A 180 nA Quiescent Current Digital Control Dual-Mode Buck Converter With a Pulse-Skipping Load Detector for Long-Range Applications.

Tsung-Heng Tsai, Tsung-Wen Sun, Kuan-Yu Liao, Chia-Chan Chang

IEEE Trans. Circuits Syst. I Regul. Pap., July, 2023

3D Point Cloud Semantic Segmentation System Based on Lightweight FPConv.

Yu-Cheng Fan, Kuan-Yu Liao, You-Sheng Xiao, Min-Hua Lu, Wei-Zhe Yan

IEEE Access, 2023

2022

3D Point-cloud Segmentation System Based on AI Model.

Kuan-Yu Liao, Min-Hua Lu, Yu-Cheng Fan

Proceedings of the 4th IEEE Global Conference on Life Sciences and Technologies, 2022

A Digital-Control Buck Converter with Dual Pulse-Skipping Modes for Internet of Things.

Tsung-Wen Sun, Kuan-Yu Liao, Tsung-Heng Tsai

Proceedings of the IEEE International Symposium on Circuits and Systems, 2022

3D Point Cloud Semantic Segmentation System.

Kuan-Yu Liao, You-Sheng Xiao, Yu-Cheng Fan

Proceedings of the 10th International Conference on Computer and Communications Management, 2022

2021

3D Point Cloud Matching Technology Based on Depth Image Based Rendering.

Guo-Han Lin, You-Sheng Xiao, Hao-An Hsieh, Kuan-Yu Liao, Yi-Cheng Liu, Yu-Cheng Fan

Proceedings of the IEEE International Conference on Consumer Electronics, 2021

2015

TARGET: Timing-AwaRe Gate Exhaustive Transition ATPG for cell-internal defects.

Ang-Feng Lin, Kuan-Yu Liao, Kuan-Ying Chiang, James Chien-Mo Li

Proceedings of the VLSI Design, Automation and Test, 2015

2014

GPU-based timing-aware test generation for small delay defects.

Kuan-Yu Liao, Po-Juei Chen, Ang-Feng Lin, James Chien-Mo Li, Michael S. Hsiao, Laung-Terng Wang

Proceedings of the 19th IEEE European Test Symposium, 2014

2013

Compact Test Pattern Selection for Small Delay Defect.

Chia-Yuan Chang, Kuan-Yu Liao, Sheng-Chang Hsu, James Chien-Mo Li, Jiann-Chyi Rau

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Automatic test pattern generation for delay defects using timed characteristic functions.

Shin-Yann Ho, Shuo-Ren Lin, Ko-Lung Yuan, Chien-Yen Kuo, Kuan-Yu Liao, Jie-Hong R. Jiang, Chien-Mo James Li

Proceedings of the IEEE/ACM International Conference on Computer-Aided Design, 2013

GPU-based n-detect transition fault ATPG.

Kuan-Yu Liao, Sheng-Chang Hsu, James Chien-Mo Li

Proceedings of the 50th Annual Design Automation Conference 2013, 2013

2011

A Parallel Test Pattern Generation Algorithm to Meet Multiple Quality Objectives.

Kuan-Yu Liao, Chia-Yuan Chang, James Chien-Mo Li

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011

Test clock domain optimization for peak power supply noise reduction during scan.

Jen-Yang Wen, Yu-Chuan Huang, Min-Hong Tsai, Kuan-Yu Liao, James Chien-Mo Li, Ming-Tung Chang, Min-Hsiu Tsai, Chih-Mou Tseng, Hung-Chun Li

Proceedings of the 2011 IEEE International Test Conference, 2011

2009

BIST design optimization for large-scale embedded memory cores.

Tzuo-Fan Chien, Wen-Chi Chao, James Chien-Mo Li, Yao-Wen Chang, Kuan-Yu Liao, Ming-Tung Chang, Min-Hsiu Tsai, Chih-Mou Tseng

Proceedings of the 2009 International Conference on Computer-Aided Design, 2009