Kyoji Yamashita

According to our database1, Kyoji Yamashita authored at least 7 papers between 2001 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

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PhD thesis 
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Links

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Bibliography

2005
A Compact Model of the Pinch-off Region of 100 nm MOSFETs Based on the Surface-Potential.
IEICE Trans. Electron., 2005

1/<i>f</i>-Noise Characteristics in 100 nm-MOSFETs and Its Modeling for Circuit Simulation.
IEICE Trans. Electron., 2005

A Test Structure for Two-Dimensional Analysis of MOSFETs by Hot-Carrier-Induced Photoemission.
IEICE Trans. Electron., 2005

2003
Temperature-independence-point properties for 0.1μm-scale pocket-implant technologies and the impact on circuit design.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

2002
Circuit Simulation Models for Coming MOSFET Generations.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

2001
Test-circuit-based extraction of inter- and intra-chip MOSFET-performance variations for analog-design reliability.
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, 2001

Correlation method of circuit-performance and technology fluctuations for improved design reliability.
Proceedings of ASP-DAC 2001, 2001


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