Laurent Maillet-Contoz

According to our database1, Laurent Maillet-Contoz authored at least 18 papers between 1997 and 2020.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2020
Model Based Methodology and Framework for Design and Management of Next-Gen IoT Systems.
Proceedings of the 1st Eclipse Research International Conference on Security, Artificial Intelligence and Modeling for the next generation Internet of Things, Virtual Event, September 17th - to, 2020

End-to-end security validation of IoT systems based on digital twins of end-devices.
Proceedings of the 2020 Global Internet of Things Summit, 2020

2017
Use of Architecture Description to Maintain Consistency in Agile Processes.
Proceedings of the 5th International Conference on Model-Driven Engineering and Software Development, 2017

2013
Co-simulation of Functional SystemC TLM Models with Power/Thermal Solvers.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

2010
A Design Flow for Critical Embedded Systems.
Proceedings of the IEEE Fifth International Symposium on Industrial Embedded Systems, 2010

OPENTLM and SOCKET: Creating an Open EcoSystem for Virtual Prototyping of Complex SOCs.
Proceedings of the Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation, 2010

Standards for System Level Design.
Proceedings of the 2010 International Conference on Computer-Aided Design, 2010

2009
Full simulation coverage for SystemC transaction-level models of systems-on-a-chip.
Formal Methods Syst. Des., 2009

2008
A Method for the Efficient Development of Timed and Untimed Transaction-Level Models of Systems-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2008

2007
Rendezvous-based MoC for untimed TLM.
Proceedings of the International Symposium on System-on-Chip, 2007

TLM: Crossing Over From Buzz To Adoption.
Proceedings of the 44th Design Automation Conference, 2007

2006
Test Coverage for Loose Timing Annotations.
Proceedings of the Formal Methods: Applications and Technology, 2006

Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip.
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006

2005
LusSy: An open tool for the analysis of systems-on-a-chip at the transaction level.
Des. Autom. Embed. Syst., 2005

Pinapa: an extraction tool for SystemC descriptions of systems-on-a-chip.
Proceedings of the EMSOFT 2005, 2005

LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level.
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005

1997
High speed intelligent machine through programmable hardware: application to genomic systems.
Proceedings of the Knowledge-Based Intelligent Electronic Systems, 1997

An Assistant for a Design Project: Application to the Design of a Mixed Hardware/Software Architecture.
Proceedings of the Knowledge Acquisition, Modeling and Management, 10th European Workshop, 1997


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