Claude Helmstetter

Orcid: 0000-0002-2323-6919

Affiliations:
  • Synopsys: Montbonnot, France


According to our database1, Claude Helmstetter authored at least 13 papers between 2006 and 2016.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Bibliography

2016
Modeling Power Consumption and Temperature in TLM Models.
Leibniz Trans. Embed. Syst., 2016

2014
TLM.open: a SystemC/TLM Frontend for the CADP Verification Toolbox.
Leibniz Trans. Embed. Syst., 2014

2013
Fast and accurate TLM simulations using temporal decoupling for FIFO-based communications.
Proceedings of the Design, Automation and Test in Europe, 2013

A dynamic stream link for efficient data flow control in NoC based heterogeneous MPSoC.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2011
Designing a CPU model: from a pseudo-formal document to fast code
CoRR, 2011

2009
Full simulation coverage for SystemC transaction-level models of systems-on-a-chip.
Formal Methods Syst. Des., 2009

Verification of an industrial SystemC/TLM model using LOTOS and CADP.
Proceedings of the 7th ACM/IEEE International Conference on Formal Methods and Models for Codesign (MEMOCODE 2009), 2009

2008
A Comparison of Two SystemC/TLM Semantics for Formal Verification.
Proceedings of the 6th ACM & IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE 2008), 2008

Generation of Executable Representation for Processor Simulation with Dynamic Translation.
Proceedings of the International Conference on Computer Science and Software Engineering, 2008

SimSoC: A SystemC TLM integrated ISS for full system simulation.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems, 2008

2007
Validation de modèles de systèmes sur puce en présence d'ordonnancements indéterministes et de temps imprécis. (Validating Models of Systems-on-a-Chip in the Presence of Nondeterministic Schedulings and Loose Timings).
PhD thesis, 2007

2006
Test Coverage for Loose Timing Annotations.
Proceedings of the Formal Methods: Applications and Technology, 2006

Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip.
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006


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