Matthieu Moy

Orcid: 0000-0002-6054-8882

According to our database1, Matthieu Moy authored at least 40 papers between 2005 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Electrical Rule Checking of Integrated Circuits using Satisfiability Modulo Theory.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2023

2022
An Optimised Flow for Futures: From Theory to Practice.
Art Sci. Eng. Program., 2022

2021
Standard-compliant parallel SystemC simulation of loosely-timed transaction level models: From baremetal to Linux-based applications support.
Integr., 2021

S4BXI: the MPI-ready Portals 4 Simulator.
Proceedings of the 29th International Symposium on Modeling, 2021

Promise Plus: Flexible Synchronization for Parallel Computations on Arrays.
Proceedings of the Fundamentals of Software Engineering - 9th International Conference, 2021

2020
Scaling Up the Memory Interference Analysis for Hard Real-Time Many-Core Systems.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

Standard-compliant Parallel SystemC simulation of Loosely-Timed Transaction Level Models.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019
Response time analysis of dataflow applications on a many-core processor with shared-memory and network-on-chip.
Proceedings of the 27th International Conference on Real-Time Networks and Systems, 2019

2018
Estimating the Impact of Architectural and Software Design Choices on Dynamic Allocation of Heterogeneous Memories.
Proceedings of the 2018 International Symposium on Rapid System Prototyping, 2018

Parallel code generation of synchronous programs for a many-core architecture.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018

2016
Modeling Power Consumption and Temperature in TLM Models.
Leibniz Trans. Embed. Syst., 2016

Causality problem in real-time calculus.
Formal Methods Syst. Des., 2016

Response Time Analysis of Synchronous Data Flow Programs on a Many-Core Processor.
Proceedings of the 24th International Conference on Real-Time Networks and Systems, 2016

2015
WCET analysis in shared resources real-time systems with TDMA buses.
Proceedings of the 23rd International Conference on Real Time Networks and Systems, 2015

Challenges for the parallelization of loosely timed SystemC programs.
Proceedings of the 2015 International Symposium on Rapid System Prototyping, 2015

2014
Modélisation à haut niveau d'abstraction pour les systèmes embarqués.
Tech. Sci. Informatiques, 2014

Modélisation à haut niveau d'abstraction pour les systèmes embarqués. (High-level Models for Embedded Systems).
, 2014

2013
Co-simulation of Functional SystemC TLM Models with Power/Thermal Solvers.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Parallel programming with SystemC for loosely timed models: a non-intrusive approach.
Proceedings of the Design, Automation and Test in Europe, 2013

Fast and accurate TLM simulations using temporal decoupling for FIFO-based communications.
Proceedings of the Design, Automation and Test in Europe, 2013

System-level modeling of energy in TLM for early validation of power and thermal management.
Proceedings of the Design, Automation and Test in Europe, 2013

2012
PAGAI: A Path Sensitive Static Analyser.
Proceedings of the Third Workshop on Tools for Automatic Program Analysis, 2012

PAGAI: a path sensitive static analyzer
CoRR, 2012

Succinct Representations for Abstract Interpretation
CoRR, 2012

Succinct Representations for Abstract Interpretation - Combined Analysis Algorithms and Experimental Evaluation.
Proceedings of the Static Analysis - 19th International Symposium, 2012

2011
Modeling of time in discrete-event simulation of systems-on-chip.
Proceedings of the 9th IEEE/ACM International Conference on Formal Methods and Models for Codesign, 2011

Efficient and playful tools to teach Unix to new students.
Proceedings of the 16th Annual SIGCSE Conference on Innovation and Technology in Computer Science Education, 2011

jTLM: An experimentation framework for the simulation of transaction-level models of Systems-on-Chip.
Proceedings of the Design, Automation and Test in Europe, 2011

2010
Performance Evaluation of Components Using a Granularity-based Interface Between Real-Time Calculus and Timed Automata
Proceedings of the Proceedings Eighth Workshop on Quantitative Aspects of Programming Languages, 2010

Arrival Curves for Real-Time Calculus: The Causality Problem and Its Solutions.
Proceedings of the Tools and Algorithms for the Construction and Analysis of Systems, 2010

A Theoretical and Experimental Review of SystemC Front-ends.
Proceedings of the 2010 Forum on specification & Design Languages, 2010

PinaVM: a systemC front-end based on an executable intermediate representation.
Proceedings of the 10th International conference on Embedded software, 2010

ac2lus: Bringing SMT-Solving and Abstract Interpretation Techniques to Real-Time Calculus through the Synchronous Language Lustre.
Proceedings of the 22nd Euromicro Conference on Real-Time Systems, 2010

2009
Automatic translation of C/C++ parallel code into synchronous formalism using an SSA intermediate form.
Electron. Commun. Eur. Assoc. Softw. Sci. Technol., 2009

2007
A SystemC/TLM Semantics in Promelaand Its Possible Applications.
Proceedings of the Model Checking Software, 2007

2006
Automatic Generation of Schedulings for Improving the Test Coverage of Systems-on-a-Chip.
Proceedings of the Formal Methods in Computer-Aided Design, 6th International Conference, 2006

2005
Techniques and Tools for the Verification of Systems-on-a-Chip at the Transaction Level. (Techniques et outils pour la vérification de Systèmes-sur-Puce au niveau transaction).
PhD thesis, 2005

LusSy: An open tool for the analysis of systems-on-a-chip at the transaction level.
Des. Autom. Embed. Syst., 2005

Pinapa: an extraction tool for SystemC descriptions of systems-on-a-chip.
Proceedings of the EMSOFT 2005, 2005

LusSy: A Toolbox for the Analysis of Systems-on-a-Chip at the Transactional Level.
Proceedings of the Fifth International Conference on Application of Concurrency to System Design (ACSD 2005), 2005


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