Leandro A. J. Marzulo

Orcid: 0000-0002-2429-9583

According to our database1, Leandro A. J. Marzulo authored at least 41 papers between 2008 and 2021.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of two.

Timeline

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Bibliography

2021
Concurrency Analysis in Dynamic Dataflow Graphs.
IEEE Trans. Emerg. Top. Comput., 2021

Gamma - General Abstract Model for Multiset mAnipulation and dynamic dataflow model: An equivalence study.
Concurr. Comput. Pract. Exp., 2021

Novel parallel processing techniques for IoT-based machine learning applications.
Concurr. Comput. Pract. Exp., 2021

2020
A multi-improvement local search using dataflow and GPU to solve the minimum latency problem.
Parallel Comput., 2020

Kernel concurrency opportunities based on GPU benchmarks characterization.
Clust. Comput., 2020

Workshop 15: MPP Parallel Programming Models - Special Edition Machine Learning Performance and Security.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium Workshops, 2020

Building a portable deeply-nested implicit information flow tracking.
Proceedings of the 17th ACM International Conference on Computing Frontiers, 2020

2019
Design of Robust, High-Entropy Strong PUFs via Weightless Neural Network.
J. Hardw. Syst. Secur., 2019

Special issue on parallel applications for <i>in-situ</i> computing on the next-generation computing platforms.
Int. J. High Perform. Comput. Appl., 2019

A dataflow runtime environment and static scheduler for edge, fog and in-situ computing.
Int. J. Grid Util. Comput., 2019

DF-DTM: Dynamic Task Memoization and reuse in dataflow.
Concurr. Comput. Pract. Exp., 2019

DTM@GPU: Characterizing and evaluating trace redundancy in GPU.
Concurr. Comput. Pract. Exp., 2019

A Feasible FPGA Weightless Neural Accelerator.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2019

Exploring the Equivalence between Dynamic Dataflow Model and Gamma - General Abstract Model for Multiset mAnipulation.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Introduction to MPP 2019.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Teaching High Performance Computing through Parallel Programming Marathons.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2019

Hardware-Accelerated Similarity Search with Multi-Index Hashing.
Proceedings of the 2019 IEEE Intl Conf on Dependable, 2019

Efficient Testing of Physically Unclonable Functions for Uniqueness.
Proceedings of the 28th IEEE Asian Test Symposium, 2019

2018
A novel List-Constrained Randomized VND approach in GPU for the Traveling Thief Problem.
Electron. Notes Discret. Math., 2018

Introduction to MPP 2018.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

A DVND Local Search Implemented on a Dataflow Architecture for the Minimum Latency Problem.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

A Malleable Vectorized Auction Algorithm for Modern Multicore Architectures.
Proceedings of the 20th IEEE International Conference on High Performance Computing and Communications; 16th IEEE International Conference on Smart City; 4th IEEE International Conference on Data Science and Systems, 2018

2017
Optimising loops in dynamic dataflow.
IET Circuits Devices Syst., 2017

A Dataflow Implementation of Region Growing Method for Cracks Segmentation.
Proceedings of the 2017 International Symposium on Computer Architecture and High Performance Computing Workshops, 2017

Towards a Dataflow Runtime Environment for Edge, Fog and In-Situ Computing.
Proceedings of the 2017 International Symposium on Computer Architecture and High Performance Computing Workshops, 2017

Realizing strong PUF from weak PUF via neural computing.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

A resilient scheduler for dataflow execution.
Proceedings of the IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2017

Analysis and Characterization of GPU Benchmarks for Kernel Concurrency Efficiency.
Proceedings of the High Performance Computing - 4th Latin American Conference, 2017

2016
Task Scheduling in Sucuri Dataflow Library.
Proceedings of the 2016 International Symposium on Computer Architecture and High Performance Computing Workshops, 2016

2015
Graph Templates for Dataflow Programming.
Proceedings of the 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, 2015

Exploiting Parallelism in Linear Algebra Kernels through Dataflow Execution.
Proceedings of the 2015 International Symposium on Computer Architecture and High Performance Computing Workshops, 2015

2014
Couillard: Parallel programming via coarse-grained Data-flow Compilation.
Parallel Comput., 2014

Stack-Tagged Dataflow.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014

Dataflow Virtual Machine Profiling.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014

A Minimalistic Dataflow Programming Library for Python.
Proceedings of the 26th IEEE International Symposium on Computer Architecture and High Performance Computing Workshop, 2014

Online error detection and recovery in dataflow execution.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Domino effect protection on dataflow error detection and recovery.
Proceedings of the 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2014

2011
Trebuchet: exploring TLP with dataflow virtualisation.
Int. J. High Perform. Syst. Archit., 2011

2010
TALM: A Hybrid Execution Model with Distributed Speculation Support.
Proceedings of the 22nd International Symposium on Computer Architecture and High Performance Computing Workshops, 2010

2009
SpMT WaveCache: Exploiting Thread-Level Parallelism in WaveScalar.
Proceedings of the CSIE 2009, 2009 WRI World Congress on Computer Science and Information Engineering, March 31, 2009

2008
Transactional WaveCache: Towards Speculative and Out-of-Order DataFlow Execution of Memory Operations.
Proceedings of the 20th International Symposium on Computer Architecture and High Performance Computing, 2008


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