Junlin Lu

According to our database1, Junlin Lu authored at least 12 papers between 2010 and 2017.

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Bibliography

2017
Locality-aware bank partitioning for shared DRAM MPSoCs.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

A Staged Memory Resource Management Method for CMP systems.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

Hybrid small class teaching: dividing and conquering large computer systems classes.
Proceedings of the ACM Turing 50th Celebration Conference, 2017

2015
CE2016: Updated computer engineering curriculum guidelines.
Proceedings of the 2015 IEEE Frontiers in Education Conference, 2015

2014
Retention Benefit Based Intelligent Cache Replacement.
J. Comput. Sci. Technol., 2014

Block value based insertion policy for high performance last-level caches.
Proceedings of the 2014 International Conference on Supercomputing, 2014

2012
Active Store Window: Enabling Far Store-Load Forwarding with Scalability and Complexity-Efficiency.
J. Comput. Sci. Technol., 2012

Improving inclusive cache performance with two-level eviction priority.
Proceedings of the 30th International IEEE Conference on Computer Design, 2012

S/DC: A storage and energy efficient data prefetcher.
Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Optimal bypass monitor for high performance last-level caches.
Proceedings of the International Conference on Parallel Architectures and Compilation Techniques, 2012

2010
Research Progress of UniCore CPUs and PKUnity SoCs.
J. Comput. Sci. Technol., 2010

FPGA prototyping of an amba-based windows-compatible SoC.
Proceedings of the ACM/SIGDA 18th International Symposium on Field Programmable Gate Arrays, 2010


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