Love Singhal

According to our database1, Love Singhal authored at least 18 papers between 2005 and 2020.

Collaborative distances:



In proceedings 
PhD thesis 




High-Definition Routing Congestion Prediction for Large-Scale FPGAs.
Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

FPGA-Accelerated Spreading for Global Placement.
Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

FPGA Accelerated FPGA Placement.
Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

A shape-driven spreading algorithm using linear programming for global placement.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

An Effective Timing-Driven Detailed Placement Algorithm for FPGAs.
Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

LSC: A Large-Scale Consensus-Based Clustering Algorithm for High-Performance FPGAs.
Proceedings of the 54th Annual Design Automation Conference, 2017

Detailed placement for modern FPGAs using 2D dynamic programming.
Proceedings of the 35th International Conference on Computer-Aided Design, 2016

Process variation aware system-level load assignment for total energy minimization using stochastic ordering.
Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

Process variation aware system-level task allocation using stochastic ordering of delay distributions.
Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Yield maximization for system-level task assignment and configuration selection of configurable multiprocessors.
Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

Statistical power profile correlation for realistic thermal estimation.
Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

Interconnect Criticality-Driven Delay Relaxation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2007

Multi-layer floorplanning for reconfigurable designs.
IET Computers & Digital Techniques, 2007

Novel Multi-Layer floorplanning for Heterogeneous FPGAs.
Proceedings of the FPL 2007, 2007

Heterogeneous Floorplanner for FPGA.
Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

Physically-aware exploitation of component reuse in a partially reconfigurable architecture.
Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Multi-layer Floorplanning on a Sequence of Reconfigurable Designs.
Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

Fast timing closure by interconnect criticality driven delay relaxation.
Proceedings of the 2005 International Conference on Computer-Aided Design, 2005