Love Singhal

According to our database, Love Singhal authored at least 18 papers between 2005 and 2020.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2020

High-Definition Routing Congestion Prediction for Large-Scale FPGAs.

Mohamed Baker Alawieh, Wuxi Li, Yibo Lin, Love Singhal, Mahesh A. Iyer, David Z. Pan

Proceedings of the 25th Asia and South Pacific Design Automation Conference, 2020

2019

FPGA-Accelerated Spreading for Global Placement.

Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan

Proceedings of the 2019 IEEE High Performance Extreme Computing Conference, 2019

FPGA Accelerated FPGA Placement.

Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan

Proceedings of the 29th International Conference on Field Programmable Logic and Applications, 2019

A shape-driven spreading algorithm using linear programming for global placement.

Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan

Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2017

An Effective Timing-Driven Detailed Placement Algorithm for FPGAs.

Shounak Dhar, Mahesh A. Iyer, Saurabh N. Adya, Love Singhal, Nikolay Rubanov, David Z. Pan

Proceedings of the 2017 ACM on International Symposium on Physical Design, 2017

LSC: A Large-Scale Consensus-Based Clustering Algorithm for High-Performance FPGAs.

Love Singhal, Mahesh A. Iyer, Saurabh N. Adya

Proceedings of the 54th Annual Design Automation Conference, 2017

2016

Detailed placement for modern FPGAs using 2D dynamic programming.

Shounak Dhar, Saurabh N. Adya, Love Singhal, Mahesh A. Iyer, David Z. Pan

Proceedings of the 35th International Conference on Computer-Aided Design, 2016

2011

Process variation aware system-level load assignment for total energy minimization using stochastic ordering.

Shahin Golshan, Love Singhal, Eli Bozorgzadeh

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

2008

Process variation aware system-level task allocation using stochastic ordering of delay distributions.

Love Singhal, Elaheh Bozorgzadeh

Proceedings of the 2008 International Conference on Computer-Aided Design, 2008

Yield maximization for system-level task assignment and configuration selection of configurable multiprocessors.

Love Singhal, Sejong Oh, Eli Bozorgzadeh

Proceedings of the 6th International Conference on Hardware/Software Codesign and System Synthesis, 2008

Statistical power profile correlation for realistic thermal estimation.

Love Singhal, Sejong Oh, Eli Bozorgzadeh

Proceedings of the 13th Asia South Pacific Design Automation Conference, 2008

2007

Interconnect Criticality-Driven Delay Relaxation.

Love Singhal, Elaheh Bozorgzadeh, David Eppstein

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007

Multi-layer floorplanning for reconfigurable designs.

Love Singhal, Elaheh Bozorgzadeh

IET Comput. Digit. Tech., 2007

Novel Multi-Layer floorplanning for Heterogeneous FPGAs.

Love Singhal, Elaheh Bozorgzadeh

Proceedings of the FPL 2007, 2007

Heterogeneous Floorplanner for FPGA.

Love Singhal, Elaheh Bozorgzadeh

Proceedings of the IEEE Symposium on Field-Programmable Custom Computing Machines, 2007

2006

Physically-aware exploitation of component reuse in a partially reconfigurable architecture.

Love Singhal, Elaheh Bozorgzadeh

Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS 2006), 2006

Multi-layer Floorplanning on a Sequence of Reconfigurable Designs.

Love Singhal, Elaheh Bozorgzadeh

Proceedings of the 2006 International Conference on Field Programmable Logic and Applications (FPL), 2006

2005

Fast timing closure by interconnect criticality driven delay relaxation.

Love Singhal, Elaheh Bozorgzadeh

Proceedings of the 2005 International Conference on Computer-Aided Design, 2005