M. Meraj Ahmed

Orcid: 0000-0001-8711-0162

According to our database1, M. Meraj Ahmed authored at least 16 papers between 2017 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2023
Defense Against On-Chip Trojans Enabling Traffic Analysis Attacks Based on Machine Learning and Data Augmentation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023

2022
An Asymmetric, One-To-Many Traffic-Aware mm-Wave Wireless Interconnection Architecture for Multichip Systems.
IEEE Trans. Emerg. Top. Comput., 2022

2021
AWARe-Wi: A jamming-aware reconfigurable wireless interconnection using adversarial learning for multichip systems.
Sustain. Comput. Informatics Syst., 2021

What Can a Remote Access Hardware Trojan do to a Network-on-Chip?
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

2020
A one-to-many traffic-oriented mm-wave wireless network-in-package interconnection architecture for multichip computing systems.
Sustain. Comput. Informatics Syst., 2020

Architecting a Secure Wireless Interconnect for Multichip Communication: An ML Approach.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

Defense Against on-Chip Trojans Enabling Traffic Analysis Attacks.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020

2019
Energy Efficient Chip-to-Chip Wireless Interconnection for Heterogeneous Architectures.
ACM Trans. Design Autom. Electr. Syst., 2019

2018
A Traffic-Aware Medium Access Control Mechanism for Energy-Efficient Wireless Network-on-Chip Architectures.
CoRR, 2018

A One-to-Many Traffic Aware Wireless Network-in-Package for Multi-Chip Computing Platforms.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018

An Asymmetric, Energy Efficient One-to-Many Traffic-Aware Wireless Network-in-Package Interconnection Architecture for Multichip Systems.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

A 0.24pJ/bit, 16Gbps OOK Transmitter Circuit in 45-nm CMOS for Inter and Intra-Chip Wireless Interconnects.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018

2017
Energy-efficient wireless interconnection framework for multichip systems with in-package memory stacks.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017

Intra-chip Wireless Interconnect: The Road Ahead.
Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017

Energy-efficiency in interconnection fabrics for inter and intra-chip communication using Graphene-based THz-band antennas.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017

Increasing interposer utilization: A scalable, energy efficient and high bandwidth multicore-multichip integration solution.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017


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