Gade Narayana Sri Harsha

ACM Trans. Design Autom. Electr. Syst., 2022

Scalable Hybrid Cache Coherence Using Emerging Links for Chiplet Architectures.

[BibT_eX]

[DOI]

Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022

2021

Design Space Optimization of Shared Memory Architecture in Accelerator-rich Systems.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2021

An Automated Traffic Generation Framework for Performance Evaluation of Networks-on-Chip for Real World Use Cases.

[BibT_eX]

[DOI]

Ravishankar Sreedharan

Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

Topology Agnostic Virtual Channel Assignment and Protocol Level Deadlock Avoidance in a Network-on-Chip.

[BibT_eX]

[DOI]

Anup Gangwar

Ravishankar Sreedharan

Ambica Prasad

Nitin Kumar Agarwal

Proceedings of the 58th ACM/IEEE Design Automation Conference, 2021

2020

Automated Synthesis of Custom Networks-on-Chip for Real World Applications.

[BibT_eX]

[DOI]

Anup Gangwar

Nitin Kumar Agarwal

Ravishankar Sreedharan

Ambica Prasad

Zheng Xu

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

2019

Energy Efficient Chip-to-Chip Wireless Interconnection for Heterogeneous Architectures.

[BibT_eX]

[DOI]

ACM Trans. Design Autom. Electr. Syst., 2019

Millimeter wave wireless interconnects in deep submicron chips: Challenges and opportunities.

[BibT_eX]

[DOI]

Shobha Sundar Ram

Integr., 2019

2018

On-Chip Wireless Channel Propagation: Impact of Antenna Directionality and Placement on Channel Performance.

[BibT_eX]

[DOI]

Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018

Enabling Reliable High Throughput On-chip Wireless Communication for Many Core Architectures.

[BibT_eX]

[DOI]

Mitali Sinha

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

High Bandwidth Off-Chip Memory Access Through Hybrid Switching and Inter-Chip Wireless Links.

[BibT_eX]

[DOI]

Hemanta Kumar Mondal

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Dynamic NoC platform for varied application needs.

[BibT_eX]

[DOI]

Proceedings of the 19th International Symposium on Quality Electronic Design, 2018

A Utilization Aware Robust Channel Access Mechanism for Wireless NoCs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Near Threshold Last Level Cache for Energy Efficient Embedded Applications.

[BibT_eX]

[DOI]

Mitali Sinha

Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018

Reliability Analysis of On-Chip Wireless Links for Many Core WNoCs.

[BibT_eX]

[DOI]

Ravi Kashyap

Proceedings of the Conference on Design of Circuits and Integrated Systems, 2018

Data-flow Aware CNN Accelerator with Hybrid Wireless Interconnection.

[BibT_eX]

[DOI]

Proceedings of the 29th IEEE International Conference on Application-specific Systems, 2018

2017

Adaptive Multi-Voltage Scaling with Utilization Prediction for Energy-Efficient Wireless NoC.

[BibT_eX]

[DOI]

IEEE Trans. Sustain. Comput., 2017

Interference-Aware Wireless Network-on-Chip Architecture Using Directional Antennas.

[BibT_eX]

[DOI]

IEEE Trans. Multi Scale Comput. Syst., 2017

HyWin: Hybrid Wireless NoC with Sandboxed Sub-Networks for CPU/GPU Architectures.

[BibT_eX]

[DOI]

IEEE Trans. Computers, 2017

P<sup>2</sup>NoC: Power- and Performance-aware NoC Architectures for Sustainable Computing.

[BibT_eX]

[DOI]

Sustain. Comput. Informatics Syst., 2017

Energy-Efficient Transceiver for Wireless NoC.

[BibT_eX]

[DOI]

Proceedings of the 30th International Conference on VLSI Design and 16th International Conference on Embedded Systems, 2017

Path loss-aware adaptive transmission power control scheme for energy-efficient wireless NoC.

[BibT_eX]

[DOI]

Proceedings of the IEEE 60th International Midwest Symposium on Circuits and Systems, 2017

OFDM Based High Data Rate, Fading Resilient Transceiver for Wireless Networks-on-Chip.

[BibT_eX]

[DOI]

Sakshi Garg

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Energy Efficient NoC Router for High Throughput Applications in Many-Core GPUs.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

2016

A Pre-RTL floorplanner tool for automated CMP design space exploration with thermal awareness.

[BibT_eX]

[DOI]

Praveen Kumar

Proceedings of the 20th International Symposium on VLSI Design and Test, 2016

Power efficient router architecture for wireless Network-on-Chip.

[BibT_eX]

[DOI]

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

Adaptive multi-voltage scaling in wireless NoC for high performance low power applications.

[BibT_eX]

[DOI]

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

A Hardware and Thermal Analysis of DVFS in a Multi-core System with Hybrid WNoC Architecture.

[BibT_eX]

[DOI]

Gade Narayana Sri Harsha

Hemanta Kumar Mondal

Proceedings of the 28th International Conference on VLSI Design, 2015

Achievable Performance Enhancements with mm-Wave Wireless Interconnects in NoC.

[BibT_eX]

[DOI]

Proceedings of the 9th International Symposium on Networks-on-Chip, 2015

Design of signal-matched critically sampled FIR rational filterbank.

[BibT_eX]

[DOI]

Anupriya Gogna

Anubha Gupta

Proceedings of the 2015 IEEE International Conference on Acoustics, 2015

Power- and performance-aware fine-grained reconfigurable router architecture for NoC.

[BibT_eX]

[DOI]

Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015

2014

An Efficient Hardware Implementation of DVFS in Multi-core System with Wireless Network-on-Chip.

[BibT_eX]

[DOI]

Hemanta Kumar Mondal

Gade Narayana Sri Harsha