Amlan Ganguly
Orcid: 0000-0002-3616-7596
According to our database1,
Amlan Ganguly
authored at least 112 papers
between 2006 and 2024.
Collaborative distances:
Collaborative distances:
Timeline
Legend:
Book In proceedings Article PhD thesis Dataset OtherLinks
On csauthors.net:
Bibliography
2024
3DL-PIM: A Look-Up Table Oriented Programmable Processing in Memory Architecture Based on the 3-D Stacked Memory for Data-Intensive Applications.
IEEE Trans. Emerg. Top. Comput., 2024
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024
2023
Defense Against On-Chip Trojans Enabling Traffic Analysis Attacks Based on Machine Learning and Data Augmentation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
Guest Editors Introduction: Special Issue on Network-on-Chip Architectures of the Future (NoCArc).
ACM J. Emerg. Technol. Comput. Syst., July, 2023
Evaluation of 60 GHz Wireless Connectivity for an Automated Warehouse Suitable for Industry 4.0.
Inf., 2023
Heterogeneous Multi-Functional Look-Up-Table-based Processing-in-Memory Architecture for Deep Learning Acceleration.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
FlutPIM: : A Look-up Table-based Processing in Memory Architecture with Floating-point Computation Support for Deep Learning Applications.
Proceedings of the Great Lakes Symposium on VLSI 2023, 2023
2022
Look-up-Table Based Processing-in-Memory Architecture With Programmable Precision-Scaling for Deep Learning Applications.
IEEE Trans. Parallel Distributed Syst., 2022
An Asymmetric, One-To-Many Traffic-Aware mm-Wave Wireless Interconnection Architecture for Multichip Systems.
IEEE Trans. Emerg. Top. Comput., 2022
Interconnects for DNA, Quantum, In-Memory, and Optical Computing: Insights From a Panel Discussion.
IEEE Micro, 2022
Guest Editors' Introduction: Special Issue on Benchmarking Machine Learning Systems and Applications.
IEEE Des. Test, 2022
IEEE Des. Test, 2022
KF-Loc: A Kalman Filter and Machine Learning Integrated Localization System Using Consumer-Grade Millimeter-Wave Hardware.
IEEE Consumer Electron. Mag., 2022
Implementation and Evaluation of Deep Neural Networks in Commercially Available Processing in Memory Hardware.
Proceedings of the 35th IEEE International System-on-Chip Conference, 2022
Proceedings of the 18th International Conference on Mobility, Sensing and Networking, 2022
DQN Based Exit Selection in Multi-Exit Deep Neural Networks for Applications Targeting Situation Awareness.
Proceedings of the IEEE International Conference on Consumer Electronics, 2022
Proceedings of the IEEE International Conference on Consumer Electronics, 2022
POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications.
Proceedings of the 25th Euromicro Conference on Digital System Design, 2022
2021
Sustain. Comput. Informatics Syst., 2021
AWARe-Wi: A jamming-aware reconfigurable wireless interconnection using adversarial learning for multichip systems.
Sustain. Comput. Informatics Syst., 2021
Proceedings of the IEEE International Symposium on Circuits and Systems, 2021
An Ultra-efficient Look-up Table based Programmable Processing in Memory Architecture for Data Encryption.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Flexible Instruction Set Architecture for Programmable Look-up Table based Processing-in-Memory.
Proceedings of the 39th IEEE International Conference on Computer Design, 2021
Proceedings of the 3rd IEEE International Conference on Artificial Intelligence Circuits and Systems, 2021
2020
A one-to-many traffic-oriented mm-wave wireless network-in-package interconnection architecture for multichip computing systems.
Sustain. Comput. Informatics Syst., 2020
Scalable and energy efficient wireless inter chip interconnection fabrics using THz-band antennas.
J. Parallel Distributed Comput., 2020
pPIM: A Programmable Processor-in-Memory Architecture With Precision-Scaling for Deep Learning.
IEEE Comput. Archit. Lett., 2020
Risk-Based A*: Simulation Analysis of a Novel Task Assignment and Path Planning Method.
Proceedings of the Winter Simulation Conference, 2020
Proceedings of the 33rd IEEE International System-on-Chip Conference, 2020
Indoor Wireless Localization Using Consumer-Grade 60 GHz Equipment with Machine Learning for Intelligent Material Handling.
Proceedings of the 2020 IEEE International Conference on Consumer Electronics (ICCE), 2020
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020
Proceedings of the IEEE Global Communications Conference, 2020
Proceedings of the Intelligent Robotics and Industrial Applications using Computer Vision 2020, 2020
Proceedings of the Autonomous Vehicles and Machines 2020, 2020
Proceedings of the 8th IEEE Conference on Communications and Network Security, 2020
Architecting a Secure Wireless Interconnect for Multichip Communication: An ML Approach.
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020
Proceedings of the Asian Hardware Oriented Security and Trust Symposium, 2020
2019
Securing a Wireless Network-on-Chip Against Jamming-Based Denial-of-Service and Eavesdropping Attacks.
IEEE Trans. Very Large Scale Integr. Syst., 2019
Energy Efficient Chip-to-Chip Wireless Interconnection for Heterogeneous Architectures.
ACM Trans. Design Autom. Electr. Syst., 2019
Unified Testing and Security Framework for Wireless Network-on-Chip Enabled Multi-Core Chips.
ACM Trans. Embed. Comput. Syst., 2019
Evaluation of wireless network-on-chip architectures with microchannel-based cooling in 3D multicore chips.
Sustain. Comput. Informatics Syst., 2019
Intra- and Inter-Chip Transmission of Millimeter-Wave Interconnects in NoC-Based Multi-Chip Systems.
IEEE Access, 2019
Task Selection by Autonomous Mobile Robots in A Warehouse Using Deep Reinforcement Learning.
Proceedings of the 2019 Winter Simulation Conference, 2019
Proceedings of the 10th International Conference on Networks of the Future, 2019
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
Proceedings of the Intelligent Robotics and Industrial Applications using Computer Vision 2019, 2019
2018
Performance Evaluation of a Power-Efficient and Robust 60 GHz Wireless Server-to-Server Datacenter Network.
IEEE Trans. Green Commun. Netw., 2018
A Traffic-Aware Medium Access Control Mechanism for Energy-Efficient Wireless Network-on-Chip Architectures.
CoRR, 2018
Simulation Analysis of a Deep Reinforcement Learning Approach for Task Selection by Autonomous material Handling Vehicles.
Proceedings of the 2018 Winter Simulation Conference, 2018
A One-to-Many Traffic Aware Wireless Network-in-Package for Multi-Chip Computing Platforms.
Proceedings of the 31st IEEE International System-on-Chip Conference, 2018
Proceedings of the Twelfth IEEE/ACM International Symposium on Networks-on-Chip, 2018
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018
An Asymmetric, Energy Efficient One-to-Many Traffic-Aware Wireless Network-in-Package Interconnection Architecture for Multichip Systems.
Proceedings of the Ninth International Green and Sustainable Computing Conference, 2018
A 0.24pJ/bit, 16Gbps OOK Transmitter Circuit in 45-nm CMOS for Inter and Intra-Chip Wireless Interconnects.
Proceedings of the 2018 on Great Lakes Symposium on VLSI, 2018
2017
IEEE Trans. Multi Scale Comput. Syst., 2017
A Wireless Interconnection Framework for Seamless Inter and Intra-Chip Communication in Multichip Systems.
IEEE Trans. Computers, 2017
A 0.36pJ/bit, 17Gbps OOK receiver in 45-nm CMOS for inter and intra-chip wireless interconnects.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Energy-efficient wireless interconnection framework for multichip systems with in-package memory stacks.
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Proceedings of the 30th IEEE International System-on-Chip Conference, 2017
Proceedings of the 4th ACM International Conference on Nanoscale Computing and Communication, 2017
Proceedings of the 10th International Workshop on Network on Chip Architectures, 2017
An Energy-Efficient, Wireless Top-of-Rack to Top-of-Rack Datacenter Network Using 60GHz Links.
Proceedings of the 2017 IEEE International Conference on Internet of Things (iThings) and IEEE Green Computing and Communications (GreenCom) and IEEE Cyber, 2017
Energy-efficiency in interconnection fabrics for inter and intra-chip communication using Graphene-based THz-band antennas.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017
PaSE: A parallel speedup estimation framework for Network-on-Chip based multicore systems.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017
Increasing interposer utilization: A scalable, energy efficient and high bandwidth multicore-multichip integration solution.
Proceedings of the Eighth International Green and Sustainable Computing Conference, 2017
Reducing Power Consumption of Datacenter Networks with 60GHz Wireless Server-to-Server Links.
Proceedings of the 2017 IEEE Global Communications Conference, 2017
2016
A Demand-Aware Predictive Dynamic Bandwidth Allocation Mechanism for Wireless Network-on-Chip.
Proceedings of the 18th System Level Interconnect Prediction Workshop, 2016
2015
Design Methodology for a Robust and Energy-Efficient Millimeter-Wave Wireless Network-on-Chip.
IEEE Trans. Multi Scale Comput. Syst., 2015
An Interconnection Architecture for Seamless Inter and Intra-Chip Communication Using Wireless Links.
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
Proceedings of the 9th International Symposium on Networks-on-Chip, 2015
Co-design of 3D wireless network-on-chip architectures with microchannel-based cooling.
Proceedings of the Sixth International Green and Sustainable Computing Conference, 2015
2014
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014
Proceedings of the 27th IEEE International System-on-Chip Conference, 2014
Proceedings of the International Green Computing Conference, 2014
Energy-efficient wireless network-on-chip architecture with log-periodic on-chip antennas.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014
2013
Sustainable and Reliable On-Chip Wireless Communication Infrastructure for Massive Multi-core Systems.
Proceedings of the Evolutionary Based Solutions for Green Computing, 2013
Design of an Energy-Efficient CMOS-Compatible NoC Architecture with Millimeter-Wave Wireless Interconnects.
IEEE Trans. Computers, 2013
ACM J. Emerg. Technol. Comput. Syst., 2013
A robust medium access mechanism for millimeter-wave Wireless Network-on-Chip architecture.
Proceedings of the 2013 IEEE International SOC Conference, Erlangen, Germany, 2013
Evaluating effects of thermal management in wireless NoC-enabled multicore architectures.
Proceedings of the International Green Computing Conference, 2013
An energy-efficient and robust millimeter-wave Wireless Network-on-Chip architecture.
Proceedings of the 2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2013
Proceedings of the Design, Automation and Test in Europe, 2013
Proceedings of the 24th International Conference on Application-Specific Systems, 2013
2012
Proceedings of the Handbook of Energy-Aware and Green Computing - Two Volume Set., 2012
ACM J. Emerg. Technol. Comput. Syst., 2012
Performance evaluation and design trade-offs for wireless network-on-chip architectures.
ACM J. Emerg. Technol. Comput. Syst., 2012
Wireless NoC as Interconnection Backbone for Multicore Chips: Promises and Challenges.
IEEE J. Emerg. Sel. Topics Circuits Syst., 2012
Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012
Proceedings of the 2012 IEEE International Symposium on Circuits and Systems, 2012
Proceedings of the 2012 International Green Computing Conference, 2012
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
CMOS compatible many-core noc architectures with multi-channel millimeter-wave wireless links.
Proceedings of the Great Lakes Symposium on VLSI 2012, 2012
2011
IEEE Trans. Computers, 2011
Proceedings of the NOCS 2011, 2011
Curbing energy cravings in networks: A cross-sectional view across the micro-macro boundary.
Proceedings of the NOCS 2011, 2011
A Unified Error Control Coding Scheme to Enhance the Reliability of a Hybrid Wireless Network-on-Chip.
Proceedings of the 2011 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2011
Sustainability through massively integrated computing: Are we ready to break the energy efficiency wall for single-chip platforms?
Proceedings of the Design, Automation and Test in Europe, 2011
2010
Proceedings of the Annual IEEE International SoC Conference, SoCC 2010, 2010
Enhancing performance of network-on-chip architectures with millimeter-wave wireless interconnects.
Proceedings of the 21st IEEE International Conference on Application-specific Systems Architectures and Processors, 2010
2009
Crosstalk-Aware Channel Coding Schemes for Energy Efficient and Reliable NOC Interconnects.
IEEE Trans. Very Large Scale Integr. Syst., 2009
Proceedings of the Second International Workshop on Network on Chip Architectures, 2009
Proceedings of the 10th International Symposium on Quality of Electronic Design (ISQED 2009), 2009
2008
J. Syst. Archit., 2008
Design of Low Power & Reliable Networks on Chip Through Joint Crosstalk Avoidance and Multiple Error Correction Coding.
J. Electron. Test., 2008
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
2007
Addressing Signal Integrity in Networks on Chip Interconnects through Crosstalk-Aware Double Error Correction Coding.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Applicability of Energy Efficient Coding Methodology to Address Signal Integrity in 3D NoC Fabrics.
Proceedings of the 13th IEEE International On-Line Testing Symposium (IOLTS 2007), 2007
2006
Proceedings of the 2006 IEEE International SOC Conference, Austin, Texas, USA, 2006
Proceedings of the Ninth Euromicro Conference on Digital System Design: Architectures, Methods and Tools (DSD 2006), 30 August, 2006
Design of Low power & Reliable Networks on Chip through joint crosstalk avoidance and forward error correction coding.
Proceedings of the 21th IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2006), 2006