Majid Haghparast

Orcid: 0000-0003-3427-5961

According to our database1, Majid Haghparast authored at least 52 papers between 2009 and 2023.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2023
Novel high-performance QCA Fredkin gate and designing scalable QCA binary to gray and vice versa.
J. Supercomput., April, 2023

Power consumption reduction in built-in self-test circuits.
J. Ambient Intell. Humaniz. Comput., February, 2023

Novel qutrit circuit design for multiplexer, De-multiplexer, and decoder.
Quantum Inf. Process., 2023

Quantum Microservices Development and Deployment.
CoRR, 2023

Novel Efficient Scalable QCA XOR and Full Adder Designs.
CoRR, 2023

Applications of Artificial Intelligence in the Economy, Including Applications in Stock Trading, Market Analysis, and Risk Management.
IEEE Access, 2023

Compact Quantum Circuit Design of PUFFIN and PRINT Lightweight Ciphers for Quantum Key Recovery Attack.
IEEE Access, 2023

Quaternary Reversible Circuit Optimization for Scalable Multiplexer and Demultiplexer.
IEEE Access, 2023

Full-Stack Quantum Software in Practice: Ecosystem, Stakeholders and Challenges.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Quantum Software Engineering Challenges from Developers' Perspective: Mapping Research Challenges to the Proposed Workflow Model.
Proceedings of the IEEE International Conference on Quantum Computing and Engineering, 2023

Quantum Algorithm Cards: Streamlining the Development of Hybrid Classical-Quantum Applications.
Proceedings of the Product-Focused Software Process Improvement, 2023

Problem Decomposition to Leverage Quantum Computing for Optimization Problems.
Proceedings of the Product-Focused Software Process Improvement, 2023

2022
Correction to: Novel design and simulation of reversible ALU in quantum dot cellular automata.
J. Supercomput., 2022

Novel design and simulation of reversible ALU in quantum dot cellular automata.
J. Supercomput., 2022

A novel hierarchical fault management framework for wireless sensor networks: HFMF.
Peer-to-Peer Netw. Appl., 2022

The Internet of Things for Applications in Wearable Technology.
IEEE Access, 2022

Toward Quaternary QCA: Novel Majority and XOR Fuzzy Gates.
IEEE Access, 2022

2021
A Novel Hybrid Fault Tolerance Architecture in the Internet of Things.
Wirel. Pers. Commun., 2021

Efficient designs of reversible sequential circuits.
J. Supercomput., 2021

Efficient binary to quaternary and vice versa converters: embedding in quaternary arithmetic circuits.
J. Supercomput., 2021

Toward novel designs of reversible ternary 6: 2 Compressor using efficient reversible ternary full-adders.
J. Supercomput., 2021

Efficient techniques for fault detection and location of multiple controlled Toffoli-based reversible circuit.
Quantum Inf. Process., 2021

Towards designing quantum reversible ternary multipliers.
Quantum Inf. Process., 2021

A novel reversible ternary coded decimal adder/subtractor.
J. Ambient Intell. Humaniz. Comput., 2021

2020
Novel Fault Management Framework Using Markov Chain in Wireless Sensor Networks: FMMC.
Wirel. Pers. Commun., 2020

Novel fault-tolerant clustering-based multipath algorithm (FTCM) for wireless sensor networks.
Telecommun. Syst., 2020

An efficient design of reversible ternary full-adder/full-subtractor with low quantum cost.
Quantum Inf. Process., 2020

Quantum Ternary Multiplication Gate (QTMG): Toward Quantum Ternary Multiplier and a New Realization for Ternary Toffoli Gate.
J. Circuits Syst. Comput., 2020

Towards designing quantum reversible 32-bit MIPS register file.
Int. J. High Perform. Syst. Archit., 2020

Efficient design of quaternary quantum comparator with only a single ancillary input.
IET Circuits Devices Syst., 2020

Efficient Designs of Reversible Majority Voters.
J. Electron. Test., 2020

Novel Optimum Parity-Preserving Reversible Multiplier Circuits.
Circuits Syst. Signal Process., 2020

Fault management frameworks in wireless sensor networks: A survey.
Comput. Commun., 2020

2019
An Energy-Efficient Dynamic Resource Management Approach Based on Clustering and Meta-Heuristic Algorithms in Cloud Computing IaaS Platforms - Energy Efficient Dynamic Cloud Resource Management.
Wirel. Pers. Commun., 2019

EFT: Novel Fault Tolerant Management Framework for Wireless Sensor Networks.
Wirel. Pers. Commun., 2019

New Fuzzy-Based Fault Tolerance Evaluation Framework for Cloud Computing.
J. Netw. Syst. Manag., 2019

Towards HDL-based Synthesis of Reversible Circuits with No Additional Lines.
Proceedings of the International Conference on Computer-Aided Design, 2019

2018
Design of a parity preserving reversible full adder/subtractor circuit.
Int. J. Comput. Intell. Stud., 2018

Air Condition's PID Controller Fine-Tuning Using Artificial Neural Networks and Genetic Algorithms.
Comput., 2018

2017
Increasing Lifetime and Fault Tolerance Capability in Wireless Sensor Networks by Providing a Novel Management Framework.
Wirel. Pers. Commun., 2017

Towards quantum reversible ternary coded decimal adder.
Quantum Inf. Process., 2017

Designing new ternary reversible subtractor circuits.
Microprocess. Microsystems, 2017

Optimized designs of reversible arithmetic logic unit.
Turkish J. Electr. Eng. Comput. Sci., 2017

Promoting the Quality Level of Signaling in Railway Transportation System Taking Advantage from Wireless Sensor Networks Technology.
Comput., 2017

2016
A survey of fault tolerance architecture in cloud computing.
J. Netw. Comput. Appl., 2016

Design of New Quantum/Reversible Ternary Subtractor Circuits.
J. Circuits Syst. Comput., 2016

2015
Novel Nanometric Reversible Low Power Bidirectional Universal Logarithmic Barrel Shifter with Overflow and Zero Flags.
J. Circuits Syst. Comput., 2015

Design of a New Parity Preserving Reversible Full Adder.
J. Circuits Syst. Comput., 2015

2014
Novel designs of nanometric parity preserving reversible compressor.
Quantum Inf. Process., 2014

A Novel Fault-Tolerant LEACH Clustering Protocol for Wireless Sensor Networks.
J. Circuits Syst. Comput., 2014

2011
Novel design of a fast reversible Wallace sign multiplier circuit in nanotechnology.
Microelectron. J., 2011

2009
Optimized Reversible Multiplier Circuit.
J. Circuits Syst. Comput., 2009


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