Majid Sabbagh

According to our database1, Majid Sabbagh authored at least 14 papers between 2014 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Optimal Placement of TDC Sensor for Enhanced Power Side-Channel Assessment on FPGAS.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
Power Side-Channel Vulnerability Assessment of Lightweight Cryptographic Scheme, XOODYAK.
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023

2021
GPU Overdrive Fault Attacks on Neural Networks.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

Overdrive Fault Attacks on GPUs.
Proceedings of the 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2021

2020
New Passive and Active Attacks on Deep Neural Networks in Medical Applications.
Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2020

A Novel GPU Overdrive Fault Attack.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Evaluating Fault Resiliency of Compressed Deep Neural Networks.
Proceedings of the 15th IEEE International Conference on Embedded Software and Systems, 2019

2018
SCADET: a side-channel attack detection tool for tracking prime+probe.
Proceedings of the International Conference on Computer-Aided Design, 2018

2016
Cardiac MRI compressed sensing image reconstruction with a graphics processing unit.
Proceedings of the 10th International Symposium on Medical Information and Communication Technology, 2016

Guiding Power/Quality Exploration for Communication-Intense Stream Processing.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2015
Power-efficient real-time solution for adaptive vision algorithms.
IET Comput. Digit. Tech., 2015

Taming the Memory Demand Complexity of Adaptive Vision Algorithms.
Proceedings of the System Level Design from HW/SW to Memory for Embedded Systems, 2015

An efficient architecture solution for low-power real-time background subtraction.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014
A Power-Efficient FPGA-Based Mixture-of-Gaussian (MoG) Background Subtraction for Full-HD Resolution.
Proceedings of the 22nd IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2014


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