Mamoru Sakamoto

According to our database1, Mamoru Sakamoto authored at least 5 papers between 1996 and 2005.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2005
A modeling method of a rule based control system with hierarchical Petri net.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2002
Code Efficiency Evaluation for Embedded Processors.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002

Embedded implementation of acoustic field enhancement for stereo headphones.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2002, 2002

2001
Evaluation of processor code efficiency for embedded systems.
Proceedings of the 15th international conference on Supercomputing, 2001

1996
Microarchitecture Support for Reducing Branch Penalty in a Supercscaler Processor.
Proceedings of the 1996 International Conference on Computer Design (ICCD '96), 1996


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